Re: [PATCH v3 2/9] target/ppc: Fix PMU MMCR0[PMCjCE] bit in hflags calculation

[Daniel Henrique Barboza <danielhb413@gmail.com>]

On 5/15/23 06:26, Nicholas Piggin wrote:
> A store to MMCR0 with PMCjCE=1 fails to update hflags correctly and
> results in hflags mismatch:
> 
>    qemu: fatal: TCG hflags mismatch (current:0x2408003d rebuilt:0x240a003d)
> 
> This can be reproduced by running perf on a recent machine.
> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---

Fixes: c2eff582a32f ("target/ppc: PMU basic cycle count for pseries TCG")

(not sure why I didn't hit this back in 2021)


Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>



> Since v2: new patch.
> 
>   target/ppc/power8-pmu.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c
> index 64a64865d7..29e0012ed6 100644
> --- a/target/ppc/power8-pmu.c
> +++ b/target/ppc/power8-pmu.c
> @@ -236,14 +236,16 @@ void helper_store_mmcr0(CPUPPCState *env, target_ulong value)
>   {
>       bool hflags_pmcc0 = (value & MMCR0_PMCC0) != 0;
>       bool hflags_pmcc1 = (value & MMCR0_PMCC1) != 0;
> +    bool hflags_pmcjce = (value & MMCR0_PMCjCE) != 0;
>   
>       pmu_update_cycles(env);
>   
>       env->spr[SPR_POWER_MMCR0] = value;
>   
> -    /* MMCR0 writes can change HFLAGS_PMCC[01] and HFLAGS_INSN_CNT */
> +    /* MMCR0 writes can change HFLAGS_PMCC[01], PMCjCE, and HFLAGS_INSN_CNT */
>       env->hflags = deposit32(env->hflags, HFLAGS_PMCC0, 1, hflags_pmcc0);
>       env->hflags = deposit32(env->hflags, HFLAGS_PMCC1, 1, hflags_pmcc1);
> +    env->hflags = deposit32(env->hflags, HFLAGS_PMCJCE, 1, hflags_pmcjce);
>   
>       pmu_update_summaries(env);
>