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Wed, 27 Jul 2022 17:29:44 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3994911C04A; Wed, 27 Jul 2022 17:29:44 +0000 (GMT) Received: from [9.171.34.118] (unknown [9.171.34.118]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 27 Jul 2022 17:29:44 +0000 (GMT) Message-ID: <4bae728d-3653-cff8-3dbb-1dbaa94bc4ff@linux.ibm.com> Date: Wed, 27 Jul 2022 19:29:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH v3 02/12] ppc/pnv: add PnvPHB base/proxy device Content-Language: en-US To: Daniel Henrique Barboza , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org References: <20220624084921.399219-1-danielhb413@gmail.com> <20220624084921.399219-3-danielhb413@gmail.com> From: Frederic Barrat In-Reply-To: <20220624084921.399219-3-danielhb413@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: q-xBXXBi2ay0ZBStrzrZme3pf-Ef6i5Z X-Proofpoint-ORIG-GUID: YPFYWdLyfcCRdakzrZNAzgjHSNTkKA4I X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-27_06,2022-07-27_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 suspectscore=0 malwarescore=0 mlxlogscore=999 phishscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 bulkscore=0 adultscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207270071 Received-SPF: pass client-ip=148.163.156.1; envelope-from=fbarrat@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 24/06/2022 10:49, Daniel Henrique Barboza wrote: > The PnvPHB device is going to be the base device for all other powernv > PHBs. It consists of a device that has the same user API as the other > PHB, namely being a PCIHostBridge and having chip-id and index > properties. It also has a 'backend' pointer that will be initialized > with the PHB implementation that the device is going to use. > > The initialization of the PHB backend is done by checking the PHB > version via a 'version' attribute that can be set via a global machine > property. The 'version' field will be used to make adjustments based on > the running version, e.g. PHB3 uses a 'chip' reference while PHB4 uses > 'pec'. To init the PnvPHB bus we'll rely on helpers for each version. > The version 3 helper is already added (pnv_phb3_bus_init), the PHB4 > helper will be added later on. > > For now let's add the basic logic of the PnvPHB object, which consists > mostly of pnv_phb_realize() doing all the work of checking the > phb->version set, initializing the proper backend, passing through its > attributes to the chosen backend, finalizing the backend realize and > adding a root port in the end. > > Signed-off-by: Daniel Henrique Barboza > --- Reviewed-by: Frederic Barrat Fred > hw/pci-host/meson.build | 3 +- > hw/pci-host/pnv_phb.c | 124 ++++++++++++++++++++++++++++++++++++++++ > hw/pci-host/pnv_phb.h | 39 +++++++++++++ > 3 files changed, 165 insertions(+), 1 deletion(-) > create mode 100644 hw/pci-host/pnv_phb.c > create mode 100644 hw/pci-host/pnv_phb.h > > diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build > index c07596d0d1..e832babc9d 100644 > --- a/hw/pci-host/meson.build > +++ b/hw/pci-host/meson.build > @@ -35,5 +35,6 @@ specific_ss.add(when: 'CONFIG_PCI_POWERNV', if_true: files( > 'pnv_phb3_msi.c', > 'pnv_phb3_pbcq.c', > 'pnv_phb4.c', > - 'pnv_phb4_pec.c' > + 'pnv_phb4_pec.c', > + 'pnv_phb.c', > )) > diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c > new file mode 100644 > index 0000000000..6fefff7d44 > --- /dev/null > +++ b/hw/pci-host/pnv_phb.c > @@ -0,0 +1,124 @@ > +/* > + * QEMU PowerPC PowerNV Proxy PHB model > + * > + * Copyright (c) 2022, IBM Corporation. > + * > + * This code is licensed under the GPL version 2 or later. See the > + * COPYING file in the top-level directory. > + */ > + > +#include "qemu/osdep.h" > +#include "qemu/log.h" > +#include "qapi/visitor.h" > +#include "qapi/error.h" > +#include "hw/pci-host/pnv_phb.h" > +#include "hw/pci-host/pnv_phb3.h" > +#include "hw/pci-host/pnv_phb4.h" > +#include "hw/ppc/pnv.h" > +#include "hw/qdev-properties.h" > +#include "qom/object.h" > + > + > +static void pnv_phb_realize(DeviceState *dev, Error **errp) > +{ > + PnvPHB *phb = PNV_PHB(dev); > + PCIHostState *pci = PCI_HOST_BRIDGE(dev); > + g_autofree char *phb_typename = NULL; > + g_autofree char *phb_rootport_typename = NULL; > + > + if (!phb->version) { > + error_setg(errp, "version not specified"); > + return; > + } > + > + switch (phb->version) { > + case 3: > + phb_typename = g_strdup(TYPE_PNV_PHB3); > + phb_rootport_typename = g_strdup(TYPE_PNV_PHB3_ROOT_PORT); > + break; > + case 4: > + phb_typename = g_strdup(TYPE_PNV_PHB4); > + phb_rootport_typename = g_strdup(TYPE_PNV_PHB4_ROOT_PORT); > + break; > + case 5: > + phb_typename = g_strdup(TYPE_PNV_PHB5); > + phb_rootport_typename = g_strdup(TYPE_PNV_PHB5_ROOT_PORT); > + break; > + default: > + g_assert_not_reached(); > + } > + > + phb->backend = object_new(phb_typename); > + object_property_add_child(OBJECT(dev), "phb-backend", phb->backend); > + > + /* Passthrough child device properties to the proxy device */ > + object_property_set_uint(phb->backend, "index", phb->phb_id, errp); > + object_property_set_uint(phb->backend, "chip-id", phb->chip_id, errp); > + object_property_set_link(phb->backend, "phb-base", OBJECT(phb), errp); > + > + if (phb->version == 3) { > + object_property_set_link(phb->backend, "chip", > + OBJECT(phb->chip), errp); > + } else { > + object_property_set_link(phb->backend, "pec", OBJECT(phb->pec), errp); > + } > + > + if (!qdev_realize(DEVICE(phb->backend), NULL, errp)) { > + return; > + } > + > + if (phb->version == 3) { > + pnv_phb3_bus_init(dev, PNV_PHB3(phb->backend)); > + } > + > + pnv_phb_attach_root_port(pci, phb_rootport_typename, > + phb->phb_id, phb->chip_id); > +} > + > +static const char *pnv_phb_root_bus_path(PCIHostState *host_bridge, > + PCIBus *rootbus) > +{ > + PnvPHB *phb = PNV_PHB(host_bridge); > + > + snprintf(phb->bus_path, sizeof(phb->bus_path), "00%02x:%02x", > + phb->chip_id, phb->phb_id); > + return phb->bus_path; > +} > + > +static Property pnv_phb_properties[] = { > + DEFINE_PROP_UINT32("index", PnvPHB, phb_id, 0), > + DEFINE_PROP_UINT32("chip-id", PnvPHB, chip_id, 0), > + DEFINE_PROP_UINT32("version", PnvPHB, version, 0), > + > + DEFINE_PROP_LINK("chip", PnvPHB, chip, TYPE_PNV_CHIP, PnvChip *), > + > + DEFINE_PROP_LINK("pec", PnvPHB, pec, TYPE_PNV_PHB4_PEC, > + PnvPhb4PecState *), > + > + DEFINE_PROP_END_OF_LIST(), > +}; > + > +static void pnv_phb_class_init(ObjectClass *klass, void *data) > +{ > + PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(klass); > + DeviceClass *dc = DEVICE_CLASS(klass); > + > + hc->root_bus_path = pnv_phb_root_bus_path; > + dc->realize = pnv_phb_realize; > + device_class_set_props(dc, pnv_phb_properties); > + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); > + dc->user_creatable = false; > +} > + > +static void pnv_phb_register_type(void) > +{ > + static const TypeInfo pnv_phb_type_info = { > + .name = TYPE_PNV_PHB, > + .parent = TYPE_PCIE_HOST_BRIDGE, > + .instance_size = sizeof(PnvPHB), > + .class_init = pnv_phb_class_init, > + }; > + > + type_register_static(&pnv_phb_type_info); > +} > +type_init(pnv_phb_register_type) > diff --git a/hw/pci-host/pnv_phb.h b/hw/pci-host/pnv_phb.h > new file mode 100644 > index 0000000000..a7cc8610e2 > --- /dev/null > +++ b/hw/pci-host/pnv_phb.h > @@ -0,0 +1,39 @@ > +/* > + * QEMU PowerPC PowerNV Proxy PHB model > + * > + * Copyright (c) 2022, IBM Corporation. > + * > + * This code is licensed under the GPL version 2 or later. See the > + * COPYING file in the top-level directory. > + */ > + > +#ifndef PCI_HOST_PNV_PHB_H > +#define PCI_HOST_PNV_PHB_H > + > +#include "hw/pci/pcie_host.h" > +#include "hw/pci/pcie_port.h" > +#include "qom/object.h" > + > +typedef struct PnvChip PnvChip; > +typedef struct PnvPhb4PecState PnvPhb4PecState; > + > +struct PnvPHB { > + PCIExpressHost parent_obj; > + > + uint32_t chip_id; > + uint32_t phb_id; > + uint32_t version; > + char bus_path[8]; > + > + PnvChip *chip; > + > + PnvPhb4PecState *pec; > + > + /* The PHB backend (PnvPHB3, PnvPHB4 ...) being used */ > + Object *backend; > +}; > + > +#define TYPE_PNV_PHB "pnv-phb" > +OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB, PNV_PHB) > + > +#endif /* PCI_HOST_PNV_PHB_H */