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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 19/20] target/arm: Convert load/store single structure to decodetree
Date: Sat, 3 Jun 2023 18:27:46 -0700	[thread overview]
Message-ID: <4bb70c74-e002-a3d7-b2b0-edd57e9238b2@linaro.org> (raw)
In-Reply-To: <20230602155223.2040685-20-peter.maydell@linaro.org>

On 6/2/23 08:52, Peter Maydell wrote:
> +# Load/store single structure
> +
> +%ldst_single_selem 13:1 21:1 !function=plus_1
> +# The index is made up from bits Q, S and the size; we may then need to scale
> +# it down by the size.
> +%ldst_single_index q:1 s:1 sz:2
> +%ldst_single_index_scaled q:1 s:1 sz:2 scale:3 !function=uimm_scaled_down
> +%ldst_single_repl_scale 10:2
> +
> +# We don't care about S in the trans functions (the decode folds it into
> +# the calculation of index), but we have to list it here so that we can
> +# handle the S-must-be-0 pattern lines. Similarly we don't care about sz
> +# once it has been used to calculate index.
> +&ldst_single    rm rn rt sz p q s selem index scale repl
> +
> +@ldst_single        . q:1 ...... p:1 . . rm:5 ... . .. rn:5 rt:5 \
> +                    &ldst_single index=%ldst_single_index_scaled \
> +                    selem=%ldst_single_selem repl=0
> +@ldst_single_repl   . q:1 ...... p:1 . . rm:5 ... . sz:2 rn:5 rt:5 \
> +                    &ldst_single index=%ldst_single_index \
> +                    scale=%ldst_single_repl_scale selem=%ldst_single_selem repl=1
> +
> +
> +ST_single       0 . 001101 . 0 . ..... 00 . s:1 sz:2 ..... ..... @ldst_single scale=0
> +ST_single       0 . 001101 . 0 . ..... 01 . s:1 00 ..... ..... @ldst_single scale=1 sz=0
> +ST_single       0 . 001101 . 0 . ..... 01 . s:1 10 ..... ..... @ldst_single scale=1 sz=2
> +ST_single       0 . 001101 . 0 . ..... 10 . s:1 00 ..... ..... @ldst_single scale=2 sz=0
> +ST_single       0 . 001101 . 0 . ..... 10 . 0 01 ..... ..... @ldst_single scale=3 sz=1 s=0

Wow, that's hard to follow.  How about

%ldst_single_selem    13:1 21:1 !function=plus_1
%ldst_single_index_b  30:1 10:3
%ldst_single_index_h  30:1 11:2
%ldst_single_index_s  30:1 12:1

@ldst_single_b     .. ...... p:1 . . rm:5 ...... rn:5 rt:5 \
                    &ldst_single scale=0 selem=%ldst_single_selem \
                    index=%ldst_single_index_b
@ldst_single_h     .. ...... p:1 . . rm:5 ...... rn:5 rt:5 \
                    &ldst_single scale=1 selem=%ldst_single_selem \
                    index=%ldst_single_index_h
@ldst_single_s     .. ...... p:1 .. rm:5 ...... rn:5 rt:5 \
                    &ldst_single scale=2 selem=%ldst_single_selem \
                    index=%ldst_single_index_s
@ldst_single_d     . index:1 ...... p:1 .. rm:5 ...... rn:5 rt:5 \
                    &ldst_single scale=3 selem=%ldst_single_selem

ST_single          0 . 001101 . 0 . ..... 00 . ... ..... .....  @ldst_single_b
ST_single          0 . 001101 . 0 . ..... 01 . ..0 ..... .....  @ldst_single_h
ST_single          0 . 001101 . 0 . ..... 10 . .00 ..... .....  @ldst_single_s
ST_single          0 . 001101 . 0 . ..... 10 . 001 ..... .....  @ldst_single_d

LD_single          0 . 001101 . 1 . ..... 00 . ... ..... .....  @ldst_single_b
LD_single          0 . 001101 . 1 . ..... 01 . ..0 ..... .....  @ldst_single_h
LD_single          0 . 001101 . 1 . ..... 10 . .00 ..... .....  @ldst_single_s
LD_single          0 . 001101 . 1 . ..... 10 . 001 ..... .....  @ldst_single_d

# Different unnamed argument set -- there is no index for repl.
LD_single_repl     0 . 001101 p:1 1 . rm:5 11 00 scale:2 rn:5 rt:5 \
                    selem=%ldst_single_selem

This is similar to how I handle similar situations in SVE, e.g. PSEL.


r~


  reply	other threads:[~2023-06-04  1:28 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-02 15:52 [PATCH 00/20] target/arm: Convert exception, system, loads and stores to decodetree Peter Maydell
2023-06-02 15:52 ` [PATCH 01/20] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics Peter Maydell
2023-06-03  5:35   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 02/20] target/arm: Convert hint instruction space to decodetree Peter Maydell
2023-06-03  5:42   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 03/20] target/arm: Convert barrier insns " Peter Maydell
2023-06-03  5:48   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 04/20] target/arm: Convert CFINV, XAFLAG and AXFLAG " Peter Maydell
2023-06-03  5:55   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 05/20] target/arm: Convert MSR (immediate) " Peter Maydell
2023-06-03  6:01   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 06/20] target/arm: Convert MSR (reg), MRS, SYS, SYSL " Peter Maydell
2023-06-03  6:05   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 07/20] target/arm: Convert exception generation instructions " Peter Maydell
2023-06-03  6:09   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 08/20] target/arm: Convert load/store exclusive and ordered " Peter Maydell
2023-06-03 22:32   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 09/20] target/arm: Convert LDXP, STXP, CASP, CAS " Peter Maydell
2023-06-03 22:44   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 10/20] target/arm: Convert load reg (literal) group " Peter Maydell
2023-06-03 22:49   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 11/20] target/arm: Convert load/store-pair " Peter Maydell
2023-06-03 23:05   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 12/20] target/arm: Convert ld/st reg+imm9 insns " Peter Maydell
2023-06-03 23:14   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 13/20] target/arm: Convert LDR/STR with 12-bit immediate " Peter Maydell
2023-06-02 20:51   ` Philippe Mathieu-Daudé
2023-06-03 16:18     ` Peter Maydell
2023-06-03 23:19   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 14/20] target/arm: Convert LDR/STR reg+reg " Peter Maydell
2023-06-03 23:27   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 15/20] target/arm: Convert atomic memory ops " Peter Maydell
2023-06-03 23:35   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 16/20] target/arm: Convert load (pointer auth) insns " Peter Maydell
2023-06-02 20:56   ` Philippe Mathieu-Daudé
2023-06-03 23:41   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 17/20] target/arm: Convert LDAPR/STLR (imm) " Peter Maydell
2023-06-03 23:55   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 18/20] target/arm: Convert load/store (multiple structures) " Peter Maydell
2023-06-04  0:00   ` Richard Henderson
2023-06-02 15:52 ` [PATCH 19/20] target/arm: Convert load/store single structure " Peter Maydell
2023-06-04  1:27   ` Richard Henderson [this message]
2023-06-02 15:52 ` [PATCH 20/20] target/arm: Convert load/store tags insns " Peter Maydell
2023-06-04  1:36   ` Richard Henderson

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