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[149.6.153.187]) by smtp.gmail.com with ESMTPSA id g19sm4813268wmh.36.2020.02.20.06.52.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Feb 2020 06:52:50 -0800 (PST) Subject: Re: [PATCH v3 2/2] qemu-cpu-models.rst: Document -noTSX, mds-no, taa-no, and tsx-ctrl To: Kashyap Chamarthy , qemu-devel@nongnu.org References: <20200220142001.20774-1-kchamart@redhat.com> <20200220142001.20774-3-kchamart@redhat.com> From: Paolo Bonzini Message-ID: <4c3f3d85-9499-2e48-124b-18cc0dc36c8a@redhat.com> Date: Thu, 20 Feb 2020 15:52:48 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <20200220142001.20774-3-kchamart@redhat.com> Content-Language: en-US X-MC-Unique: Fj4MtdeoM4yrVvKqpybAdw-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, berrange@redhat.com, Eduardo Habkost , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Two small changes... On 20/02/20 15:20, Kashyap Chamarthy wrote: > + Recommended to inform the guest that it can disable the Intel TSX > + (Transactional Synchronization Extensions) feature; or, if the > + processor is vulnerable, use the Intel VERW instruction (a > + processor-level instruction that performs checks on memory access) as > + a mitigation for the TAA vulnerability. (For details, refer to this > + `Intel's deep-dive into > + MDS `_.) ... refer to Intel's `deep dive into MDS <...>`_. (I don't know what the trailing underscore is for. I reaffirm my definition of rST as the Perl of markup formats). > + > + Expose this to the guest OS if and only if: (a) the host has TSX > + enabled; *and* (b) the guest has ``rtm`` CPU flag enabled. > + > + By disabling TSX, KVM-based guests can avoid paying the price of > + mitigting TSX-based attacks. "mitigating" Paolo