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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 1/7] target/arm: Fix missing temp frees in do_vshll_2sh
Date: Tue, 9 Jun 2020 10:09:39 -0700	[thread overview]
Message-ID: <4cfdc2ae-4766-841c-5fe8-1b7c09ccbb34@linaro.org> (raw)
In-Reply-To: <20200609160209.29960-2-peter.maydell@linaro.org>

On 6/9/20 9:02 AM, Peter Maydell wrote:
> The widenfn() in do_vshll_2sh() does not free the input 32-bit
> TCGv, so we need to do this in the calling code.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

> ---
>  target/arm/translate-neon.inc.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.inc.c
> index 664d3612607..299a61f067b 100644
> --- a/target/arm/translate-neon.inc.c
> +++ b/target/arm/translate-neon.inc.c
> @@ -1624,6 +1624,7 @@ static bool do_vshll_2sh(DisasContext *s, arg_2reg_shift *a,
>      tmp = tcg_temp_new_i64();
>  
>      widenfn(tmp, rm0);
> +    tcg_temp_free_i32(rm0);
>      if (a->shift != 0) {
>          tcg_gen_shli_i64(tmp, tmp, a->shift);
>          tcg_gen_andi_i64(tmp, tmp, ~widen_mask);
> @@ -1631,6 +1632,7 @@ static bool do_vshll_2sh(DisasContext *s, arg_2reg_shift *a,
>      neon_store_reg64(tmp, a->vd);
>  
>      widenfn(tmp, rm1);
> +    tcg_temp_free_i32(rm1);
>      if (a->shift != 0) {
>          tcg_gen_shli_i64(tmp, tmp, a->shift);
>          tcg_gen_andi_i64(tmp, tmp, ~widen_mask);
> 



  reply	other threads:[~2020-06-09 17:34 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-09 16:02 [PATCH 0/7] target/arm: Convert Neon 3-reg-diff to decodetree Peter Maydell
2020-06-09 16:02 ` [PATCH 1/7] target/arm: Fix missing temp frees in do_vshll_2sh Peter Maydell
2020-06-09 17:09   ` Richard Henderson [this message]
2020-06-10  7:34   ` Philippe Mathieu-Daudé
2020-06-09 16:02 ` [PATCH 2/7] target/arm: Convert Neon 3-reg-diff prewidening ops to decodetree Peter Maydell
2020-06-09 17:26   ` Richard Henderson
2020-06-09 16:02 ` [PATCH 3/7] target/arm: Convert Neon 3-reg-diff narrowing " Peter Maydell
2020-06-09 17:40   ` Richard Henderson
2020-06-09 16:02 ` [PATCH 4/7] target/arm: Convert Neon 3-reg-diff VABAL, VABDL " Peter Maydell
2020-06-09 18:16   ` Richard Henderson
2020-06-09 16:02 ` [PATCH 5/7] target/arm: Convert Neon 3-reg-diff long multiplies Peter Maydell
2020-06-09 18:26   ` Richard Henderson
2020-06-09 16:02 ` [PATCH 6/7] target/arm: Convert Neon 3-reg-diff saturating doubling multiplies Peter Maydell
2020-06-09 18:45   ` Richard Henderson
2020-06-09 16:02 ` [PATCH 7/7] target/arm: Convert Neon 3-reg-diff polynomial VMULL Peter Maydell
2020-06-09 18:56   ` Richard Henderson
2020-06-09 17:01 ` [PATCH 0/7] target/arm: Convert Neon 3-reg-diff to decodetree no-reply
2020-06-09 17:29 ` no-reply
2020-06-09 17:33 ` no-reply
2020-06-09 20:12 ` no-reply
2020-06-09 21:07 ` no-reply
2020-06-09 21:10 ` no-reply
2020-06-10  7:41 ` Philippe Mathieu-Daudé

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