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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id n5sm3641052wrm.2.2020.10.22.06.01.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 22 Oct 2020 06:01:02 -0700 (PDT) Subject: Re: [PATCH] i386/cpu: Expose the PTWRITE to the guest To: Luwei Kang , rth@twiddle.net, ehabkost@redhat.com References: <20201022040122.30086-1-luwei.kang@intel.com> From: Paolo Bonzini Message-ID: <4d21bf6c-a6b3-c0fe-d291-9661fa6436fb@redhat.com> Date: Thu, 22 Oct 2020 15:01:01 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: <20201022040122.30086-1-luwei.kang@intel.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=pbonzini@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=216.205.24.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/22 08:33:10 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.107, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 22/10/20 06:01, Luwei Kang wrote: > PTWRITE provides a mechanism by which software can instrument the > Intel PT trace. The current implementation will mask off this > feature when the PTWRITE is supported on the host because of the > Intel PT CPUID is a constant value(ICX CPUID) in qemu. This patch > will expose the PTWRITE feature to the guest. > > Signed-off-by: Luwei Kang > --- > target/i386/cpu.c | 24 ++++++++++++++++++++++++ > target/i386/cpu.h | 4 ++++ > 2 files changed, 28 insertions(+) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index aeabdd5bd4..242ba8a870 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -672,6 +672,7 @@ static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1, > #define TCG_XSAVE_FEATURES (CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XGETBV1) > /* missing: > CPUID_XSAVE_XSAVEC, CPUID_XSAVE_XSAVES */ > +#define TCG_14_0_EBX_FEATURES 0 > #define TCG_14_0_ECX_FEATURES 0 > > typedef enum FeatureWordType { > @@ -1302,6 +1303,26 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { > } > }, > > + [FEAT_14_0_EBX] = { > + .type = CPUID_FEATURE_WORD, > + .feat_names = { > + NULL, NULL, NULL, NULL, > + "ptwrite", NULL, NULL, NULL, > + NULL, NULL, NULL, NULL, > + NULL, NULL, NULL, NULL, > + NULL, NULL, NULL, NULL, > + NULL, NULL, NULL, NULL, > + NULL, NULL, NULL, NULL, > + NULL, NULL, NULL, NULL, > + }, > + .cpuid = { > + .eax = 0x14, > + .needs_ecx = true, .ecx = 0, > + .reg = R_EBX, > + }, > + .tcg_features = TCG_14_0_EBX_FEATURES, > + }, > + Please add a dependency on the processor tracing flag too. Paolo > [FEAT_14_0_ECX] = { > .type = CPUID_FEATURE_WORD, > .feat_names = { > @@ -5764,6 +5785,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, > *eax = INTEL_PT_MAX_SUBLEAF; > *ebx = INTEL_PT_MINIMAL_EBX; > *ecx = INTEL_PT_MINIMAL_ECX; > + if (env->features[FEAT_14_0_EBX] & CPUID_14_0_EBX_PTWRITE) { > + *ebx |= CPUID_14_0_EBX_PTWRITE; > + } > if (env->features[FEAT_14_0_ECX] & CPUID_14_0_ECX_LIP) { > *ecx |= CPUID_14_0_ECX_LIP; > } > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index 1fcd93e39a..9fffe6eb6f 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -541,6 +541,7 @@ typedef enum FeatureWord { > FEAT_VMX_EPT_VPID_CAPS, > FEAT_VMX_BASIC, > FEAT_VMX_VMFUNC, > + FEAT_14_0_EBX, > FEAT_14_0_ECX, > FEATURE_WORDS, > } FeatureWord; > @@ -798,6 +799,9 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; > /* AVX512 BFloat16 Instruction */ > #define CPUID_7_1_EAX_AVX512_BF16 (1U << 5) > > +/* Intel PT support PTWRITE */ > +#define CPUID_14_0_EBX_PTWRITE (1U << 4) > + > /* Packets which contain IP payload have LIP values */ > #define CPUID_14_0_ECX_LIP (1U << 31) > >