From: Richard Henderson <richard.henderson@linaro.org>
To: "Emilio G. Cota" <cota@braap.org>,
"Alex Bennée" <alex.bennee@linaro.org>
Cc: qemu-devel <qemu-devel@nongnu.org>,
Pranith Kumar <bobby.prani@gmail.com>
Subject: Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)
Date: Mon, 1 Oct 2018 15:40:37 -0500 [thread overview]
Message-ID: <4d2fbab5-13c8-1c19-5e58-02968cdcfef0@linaro.org> (raw)
In-Reply-To: <20181001183423.GA27555@flamenco>
On 10/1/18 1:34 PM, Emilio G. Cota wrote:
> On Thu, Sep 20, 2018 at 01:19:51 +0100, Alex Bennée wrote:
>> If we are going to have an indirection then we can also drop the
>> requirement to scale the TLB according to the number of MMU indexes we
>> have to support. It's fairly wasteful when a bunch of them are almost
>> never used unless you are running stuff that uses them.
>
> So with dynamic TLB sizing, what you're suggesting here is to resize
> each MMU array independently (depending on their use rate) instead
> of using a single "TLB size" for all MMU indexes. Am I understanding
> your point correctly?
You cannot do that without flushing the TBs (and with out-of-line memory ops,
the prologue as well) and regenerating. The TLB size is baked into the code.
And we really don't have any extra registers free to vary that.
r~
next prev parent reply other threads:[~2018-10-01 20:54 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20180919175423.GA25553@flamenco>
[not found] ` <87va71uijc.fsf@linaro.org>
2018-10-01 18:34 ` [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted) Emilio G. Cota
2018-10-01 20:40 ` Richard Henderson [this message]
2018-10-02 1:54 ` Emilio G. Cota
2018-10-02 6:48 ` Alex Bennée
2018-10-02 18:09 ` Emilio G. Cota
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