From: Thomas Huth <thuth@redhat.com>
To: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: troy_lee@aspeedtech.com, yunlin.tang@aspeedtech.com
Subject: Re: [PATCH v5 7/7] hw/gpio/aspeed: Add test case for AST2700
Date: Fri, 27 Sep 2024 11:29:28 +0200 [thread overview]
Message-ID: <4d4a0c9b-45df-4d2e-b47d-f9ab898801cd@redhat.com> (raw)
In-Reply-To: <20240927083351.2637798-8-jamin_lin@aspeedtech.com>
On 27/09/2024 10.33, Jamin Lin wrote:
> Add test case to test GPIO output and input pins from A0 to D7 for AST2700.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> tests/qtest/aspeed_gpio-test.c | 68 ++++++++++++++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
> index d38f51d719..9d978b70e0 100644
> --- a/tests/qtest/aspeed_gpio-test.c
> +++ b/tests/qtest/aspeed_gpio-test.c
> @@ -33,6 +33,10 @@
> #define GPIO_ABCD_DATA_VALUE 0x000
> #define GPIO_ABCD_DIRECTION 0x004
>
> +/* AST2700 */
> +#define AST2700_GPIO_BASE 0x14C0B000
> +#define GPIOA0_CONTROL 0x180
> +
> static void test_set_colocated_pins(const void *data)
> {
> QTestState *s = (QTestState *)data;
> @@ -72,8 +76,64 @@ static void test_set_input_pins(const void *data)
> g_assert_cmphex(value, ==, 0xffffffff);
> }
>
> +static void test_2700_output_pins(const void *data)
> +{
> + QTestState *s = (QTestState *)data;
> + uint32_t offset = 0;
> + uint32_t value = 0;
> + uint32_t pin = 0;
> +
> + for (char c = 'A'; c <= 'D'; c++) {
> + for (int i = 0; i < 8; i++) {
> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
> +
> + /* output direction and output hi */
> + qtest_writel(s, offset, 0x00000003);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00000003);
> +
> + /* output direction and output low */
> + qtest_writel(s, offset, 0x00000002);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00000002);
> + pin++;
> + }
> + }
> +}
> +
> +static void test_2700_input_pins(const void *data)
> +{
> + QTestState *s = (QTestState *)data;
> + char name[16];
> + uint32_t offset = 0;
> + uint32_t value = 0;
> + uint32_t pin = 0;
> +
> + for (char c = 'A'; c <= 'D'; c++) {
> + for (int i = 0; i < 8; i++) {
> + sprintf(name, "gpio%c%d", c, i);
> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
> + /* input direction */
> + qtest_writel(s, offset, 0);
> +
> + /* set input */
> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, true);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00002000);
> +
> + /* clear input */
> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, false);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0);
> + pin++;
> + }
> + }
> +}
> +
> +
> int main(int argc, char **argv)
> {
> + const char *arch = qtest_get_arch();
> QTestState *s;
> int r;
>
> @@ -83,6 +143,14 @@ int main(int argc, char **argv)
> qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
> test_set_colocated_pins);
> qtest_add_data_func("/ast2600/gpio/set_input_pins", s, test_set_input_pins);
> +
> + if (strcmp(arch, "aarch64") == 0) {
> + s = qtest_init("-machine ast2700-evb");
> + qtest_add_data_func("/ast2700/gpio/input_pins",
> + s, test_2700_input_pins);
> + qtest_add_data_func("/ast2700/gpio/out_pins", s, test_2700_output_pins);
> + }
Are you sure that this is executed here at all? As far as I can see,
aspeed_gpio-test is not executed for the aarch64 target at all, so this
looks like dead code to me.
Thomas
next prev parent reply other threads:[~2024-09-27 9:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-27 8:33 [PATCH v5 0/7] Support GPIO for AST2700 Jamin Lin via
2024-09-27 8:33 ` [PATCH v5 1/7] hw/gpio/aspeed: Fix coding style Jamin Lin via
2024-09-27 8:33 ` [PATCH v5 2/7] hw/gpio/aspeed: Support to set the different memory size Jamin Lin via
2024-09-27 8:33 ` [PATCH v5 3/7] hw/gpio/aspeed: Support different memory region ops Jamin Lin via
2024-09-27 8:33 ` [PATCH v5 4/7] hw/gpio/aspeed: Fix clear incorrect interrupt status for GPIO index mode Jamin Lin via
2024-09-27 8:33 ` [PATCH v5 5/7] hw/gpio/aspeed: Add AST2700 support Jamin Lin via
2024-09-27 8:33 ` [PATCH v5 6/7] aspeed/soc: Support GPIO for AST2700 and correct irq 130 Jamin Lin via
2024-09-27 9:29 ` Cédric Le Goater
2024-09-30 5:52 ` Jamin Lin
2024-09-27 8:33 ` [PATCH v5 7/7] hw/gpio/aspeed: Add test case for AST2700 Jamin Lin via
2024-09-27 9:29 ` Thomas Huth [this message]
2024-09-30 5:55 ` Jamin Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4d4a0c9b-45df-4d2e-b47d-f9ab898801cd@redhat.com \
--to=thuth@redhat.com \
--cc=andrew@codeconstruct.com.au \
--cc=clg@kaod.org \
--cc=jamin_lin@aspeedtech.com \
--cc=joel@jms.id.au \
--cc=leetroy@gmail.com \
--cc=lvivier@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=steven_lee@aspeedtech.com \
--cc=troy_lee@aspeedtech.com \
--cc=yunlin.tang@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).