From: Richard Henderson <richard.henderson@linaro.org>
To: Ard Biesheuvel <ardb@kernel.org>, qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Zewen Ye" <lustrew@foxmail.com>,
"Weiwei Li" <liweiwei@iscas.ac.cn>,
"Junqiang Wang" <wangjunqiang@iscas.ac.cn>
Subject: Re: [PATCH] target/riscv: Use existing lookup tables for AES MixColumns
Date: Thu, 27 Jul 2023 09:40:42 -0700 [thread overview]
Message-ID: <4dc8f541-2cf9-c8fa-1032-e5ae632c4881@linaro.org> (raw)
In-Reply-To: <20230727070303.1220037-1-ardb@kernel.org>
On 7/27/23 00:03, Ard Biesheuvel wrote:
> @@ -606,8 +606,7 @@ static const uint32_t AES_Te4[256] = {
> 0x41414141U, 0x99999999U, 0x2d2d2d2dU, 0x0f0f0f0fU,
> 0xb0b0b0b0U, 0x54545454U, 0xbbbbbbbbU, 0x16161616U,
> };
> -
> -static const uint32_t AES_Td0[256] = {
> +const uint32_t AES_Td0[256] = {
Don't drop the blank line.
> @@ -62,18 +39,21 @@ static inline target_ulong aes32_operation(target_ulong shamt,
> if (enc) {
> so = AES_sbox[si];
> if (mix) {
> - mixed = aes_mixcolumn_byte(so, true);
> + mixed = AES_Te0[si];
> } else {
> mixed = so;
> }
> } else {
> so = AES_isbox[si];
> if (mix) {
> - mixed = aes_mixcolumn_byte(so, false);
> + mixed = AES_Td0[si];
> } else {
> mixed = so;
> }
> }
> + if (!HOST_BIG_ENDIAN && mix) {
> + mixed = bswap32(mixed);
> + }
> mixed = rol32(mixed, shamt);
Better as
if (enc) {
if (mix) {
mixed = be32_to_cpu(AES_Te0[si]);
} else {
mixed = AES_sbox[si];
}
} else {
...
}
mixed = rol32(mixed, shamt);
But thanks for the update -- I had ignored rv32 when doing the other AES bits.
r~
prev parent reply other threads:[~2023-07-27 17:46 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-27 7:03 [PATCH] target/riscv: Use existing lookup tables for AES MixColumns Ard Biesheuvel
2023-07-27 16:40 ` Richard Henderson [this message]
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