From: Richard Henderson <richard.henderson@linaro.org>
To: Luis Pires <luis.pires@eldorado.org.br>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: david@gibson.dropbear.id.au
Subject: Re: [PATCH] target/ppc: fix setting of CR flags in bcdcfsq
Date: Sun, 5 Sep 2021 12:47:24 +0200 [thread overview]
Message-ID: <4dfb5ffb-faac-a160-250c-4d9dfca1cb01@linaro.org> (raw)
In-Reply-To: <20210823150235.35759-1-luis.pires@eldorado.org.br>
On 8/23/21 5:02 PM, Luis Pires wrote:
> According to the ISA, CR should be set based on the source value, and
> not on the packed decimal result.
> The way this was implemented would cause GT, LT and EQ to be set
> incorrectly when the source value was too large and the 31 least
> significant digits of the packed decimal result ended up being all zero.
> This would happen for source values of +/-10^31, +/-10^32, etc.
>
> The new implementation fixes this and also skips the result calculation
> altogether in case of src overflow.
>
> Signed-off-by: Luis Pires<luis.pires@eldorado.org.br>
> ---
> target/ppc/int_helper.c | 61 ++++++++++++++++++++++++++++++++---------
> 1 file changed, 48 insertions(+), 13 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-09-05 10:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-23 15:02 [PATCH] target/ppc: fix setting of CR flags in bcdcfsq Luis Pires
2021-08-25 3:12 ` David Gibson
2021-09-05 10:47 ` Richard Henderson [this message]
2021-09-06 2:55 ` David Gibson
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