From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:36832) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QmNsH-0000ap-9m for qemu-devel@nongnu.org; Thu, 28 Jul 2011 06:31:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QmNsG-0006bm-6v for qemu-devel@nongnu.org; Thu, 28 Jul 2011 06:31:29 -0400 Received: from mail-yi0-f45.google.com ([209.85.218.45]:57200) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QmNsG-0006bX-4T for qemu-devel@nongnu.org; Thu, 28 Jul 2011 06:31:28 -0400 Received: by yia25 with SMTP id 25so2027061yia.4 for ; Thu, 28 Jul 2011 03:31:27 -0700 (PDT) Message-ID: <4e313a7e.c926440a.2e83.4a11@mx.google.com> Date: Thu, 28 Jul 2011 19:31:16 +0900 From: tsnsaito@gmail.com In-Reply-To: <316f198de781f7b819456f433d84ead284769a71.1311606610.git.atar4qemu@gmail.com> References: <316f198de781f7b819456f433d84ead284769a71.1311606610.git.atar4qemu@gmail.com> MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Qemu-devel] [PATCH] fix disabling interrupts in sun4u List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Artyom Tarasenko Cc: blauwirbel@gmail.com, qemu-devel@nongnu.org Hi, At Mon, 25 Jul 2011 19:22:38 +0200, Artyom Tarasenko wrote: > clear interrupt request if the interrupt priority < CPU pil > clear hardware interrupt request if interrupts are disabled Not directly related to the fix, but I'd like to note a problem of hw/sun4u.c interrupt code: The interrupt code probably mixes hardware interrupts and software interrupts. %pil is for software interrupts (interrupt_level_n traps). %pil can not mask hardware interrupts (interrupt_vector traps); the CPU raises interrupt_vector traps even on %pil=15. But in cpu_check_irqs() and cpu_set_irq(), hardware interrupts seem to be masked by %pil. > Signed-off-by: Artyom Tarasenko > --- > hw/sun4u.c | 6 ++++-- > 1 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/hw/sun4u.c b/hw/sun4u.c > index d7dcaf0..7f95aeb 100644 > --- a/hw/sun4u.c > +++ b/hw/sun4u.c > @@ -255,7 +255,7 @@ void cpu_check_irqs(CPUState *env) > pil |= 1 << 14; > } > > - if (!pil) { > + if (pil < (2 << env->psrpil)){ > if (env->interrupt_request & CPU_INTERRUPT_HARD) { > CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n", > env->interrupt_index); > @@ -287,10 +287,12 @@ void cpu_check_irqs(CPUState *env) > break; > } > } > - } else { > + } else if (env->interrupt_request & CPU_INTERRUPT_HARD) { > CPUIRQ_DPRINTF("Interrupts disabled, pil=%08x pil_in=%08x softint=%08x " > "current interrupt %x\n", > pil, env->pil_in, env->softint, env->interrupt_index); > + env->interrupt_index = 0; > + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); > } > } > > -- > 1.7.3.4 ---- Tsuneo Saito