* [PATCH 00/11] accel/tcg: Finish building once
@ 2025-05-01 14:55 Richard Henderson
2025-05-01 14:55 ` [PATCH 01/11] accel/tcg: Move user-only tlb_vaddr_to_host out of line Richard Henderson
` (11 more replies)
0 siblings, 12 replies; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
Based-on: 20250430230631.2571291-1-richard.henderson@linaro.org
("[PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice")
Adjust the final two files in accel/tcg/ to build once.
r~
Richard Henderson (11):
accel/tcg: Move user-only tlb_vaddr_to_host out of line
accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
accel/tcg: Use target_long_bits() in cputlb.c
accel/tcg: Use vaddr for plugin_{load,store}_cb
accel/tcg: Build cputlb.c once
include/user: Convert GUEST_ADDR_MAX to a variable
include/user: Use vaddr in guest-host.h
accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr
accel/tcg: Remove TARGET_PAGE_DATA_SIZE
accel/tcg: Avoid abi_ptr in user-exec.c
accel/tcg: Build user-exec.c once
include/accel/tcg/cpu-ldst.h | 24 -------------
include/accel/tcg/cpu-ops.h | 7 ++++
include/accel/tcg/probe.h | 16 +++++++++
include/user/guest-host.h | 49 ++++++++++----------------
include/user/page-protection.h | 8 +++--
target/arm/cpu-param.h | 7 +---
target/arm/cpu.h | 36 +------------------
accel/tcg/cputlb.c | 28 ++++++++-------
accel/tcg/user-exec.c | 63 ++++++++++++++++++++++------------
bsd-user/main.c | 8 +++++
linux-user/main.c | 8 +++++
target/arm/cpu.c | 27 ++++++++++++++-
target/arm/tcg/mte_helper.c | 4 +--
accel/tcg/ldst_common.c.inc | 4 +--
accel/tcg/meson.build | 10 ++----
15 files changed, 154 insertions(+), 145 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 01/11] accel/tcg: Move user-only tlb_vaddr_to_host out of line
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 15:59 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h Richard Henderson
` (10 subsequent siblings)
11 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
At the same time, fix a mis-match between user and system
by using vaddr not abi_ptr for the address parameter.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/accel/tcg/cpu-ldst.h | 8 --------
accel/tcg/user-exec.c | 6 ++++++
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/include/accel/tcg/cpu-ldst.h b/include/accel/tcg/cpu-ldst.h
index 44a62b54da..00e6419e13 100644
--- a/include/accel/tcg/cpu-ldst.h
+++ b/include/accel/tcg/cpu-ldst.h
@@ -515,15 +515,7 @@ static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
* Otherwise (TLB entry is for an I/O access, guest software
* TLB fill required, etc) return NULL.
*/
-#ifdef CONFIG_USER_ONLY
-static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,
- MMUAccessType access_type, int mmu_idx)
-{
- return g2h(env_cpu(env), addr);
-}
-#else
void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr,
MMUAccessType access_type, int mmu_idx);
-#endif
#endif /* ACCEL_TCG_CPU_LDST_H */
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index e1f4c4eacf..adc5296ba5 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -850,6 +850,12 @@ void *probe_access(CPUArchState *env, vaddr addr, int size,
return size ? g2h(env_cpu(env), addr) : NULL;
}
+void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr,
+ MMUAccessType access_type, int mmu_idx)
+{
+ return g2h(env_cpu(env), addr);
+}
+
tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr,
void **hostp)
{
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
2025-05-01 14:55 ` [PATCH 01/11] accel/tcg: Move user-only tlb_vaddr_to_host out of line Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:00 ` Pierrick Bouvier
2025-05-01 17:24 ` Philippe Mathieu-Daudé
2025-05-01 14:55 ` [PATCH 03/11] accel/tcg: Use target_long_bits() in cputlb.c Richard Henderson
` (9 subsequent siblings)
11 siblings, 2 replies; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
This is a probing function, not a load/store function.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/accel/tcg/cpu-ldst.h | 16 ----------------
include/accel/tcg/probe.h | 16 ++++++++++++++++
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/include/accel/tcg/cpu-ldst.h b/include/accel/tcg/cpu-ldst.h
index 00e6419e13..0de7f5eaa6 100644
--- a/include/accel/tcg/cpu-ldst.h
+++ b/include/accel/tcg/cpu-ldst.h
@@ -502,20 +502,4 @@ static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
return cpu_ldq_code_mmu(env, addr, oi, 0);
}
-/**
- * tlb_vaddr_to_host:
- * @env: CPUArchState
- * @addr: guest virtual address to look up
- * @access_type: 0 for read, 1 for write, 2 for execute
- * @mmu_idx: MMU index to use for lookup
- *
- * Look up the specified guest virtual index in the TCG softmmu TLB.
- * If we can translate a host virtual address suitable for direct RAM
- * access, without causing a guest exception, then return it.
- * Otherwise (TLB entry is for an I/O access, guest software
- * TLB fill required, etc) return NULL.
- */
-void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr,
- MMUAccessType access_type, int mmu_idx);
-
#endif /* ACCEL_TCG_CPU_LDST_H */
diff --git a/include/accel/tcg/probe.h b/include/accel/tcg/probe.h
index 177bd1608d..dd9ecbbdf1 100644
--- a/include/accel/tcg/probe.h
+++ b/include/accel/tcg/probe.h
@@ -103,4 +103,20 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
#endif /* !CONFIG_USER_ONLY */
+/**
+ * tlb_vaddr_to_host:
+ * @env: CPUArchState
+ * @addr: guest virtual address to look up
+ * @access_type: 0 for read, 1 for write, 2 for execute
+ * @mmu_idx: MMU index to use for lookup
+ *
+ * Look up the specified guest virtual index in the TCG softmmu TLB.
+ * If we can translate a host virtual address suitable for direct RAM
+ * access, without causing a guest exception, then return it.
+ * Otherwise (TLB entry is for an I/O access, guest software
+ * TLB fill required, etc) return NULL.
+ */
+void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr,
+ MMUAccessType access_type, int mmu_idx);
+
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 03/11] accel/tcg: Use target_long_bits() in cputlb.c
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
2025-05-01 14:55 ` [PATCH 01/11] accel/tcg: Move user-only tlb_vaddr_to_host out of line Richard Henderson
2025-05-01 14:55 ` [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:01 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 04/11] accel/tcg: Use vaddr for plugin_{load,store}_cb Richard Henderson
` (8 subsequent siblings)
11 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cputlb.c | 25 +++++++++++++------------
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 5b6d6f7975..35c467aace 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
+#include "qemu/target-info.h"
#include "accel/tcg/cpu-ops.h"
#include "accel/tcg/iommu.h"
#include "accel/tcg/probe.h"
@@ -771,19 +772,19 @@ void tlb_flush_range_by_mmuidx(CPUState *cpu, vaddr addr,
assert_cpu_is_self(cpu);
+ /* If no page bits are significant, this devolves to tlb_flush. */
+ if (bits < TARGET_PAGE_BITS) {
+ tlb_flush_by_mmuidx(cpu, idxmap);
+ return;
+ }
/*
* If all bits are significant, and len is small,
* this devolves to tlb_flush_page.
*/
- if (bits >= TARGET_LONG_BITS && len <= TARGET_PAGE_SIZE) {
+ if (len <= TARGET_PAGE_SIZE && bits >= target_long_bits()) {
tlb_flush_page_by_mmuidx(cpu, addr, idxmap);
return;
}
- /* If no page bits are significant, this devolves to tlb_flush. */
- if (bits < TARGET_PAGE_BITS) {
- tlb_flush_by_mmuidx(cpu, idxmap);
- return;
- }
/* This should already be page aligned */
d.addr = addr & TARGET_PAGE_MASK;
@@ -809,19 +810,19 @@ void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *src_cpu,
TLBFlushRangeData d, *p;
CPUState *dst_cpu;
+ /* If no page bits are significant, this devolves to tlb_flush. */
+ if (bits < TARGET_PAGE_BITS) {
+ tlb_flush_by_mmuidx_all_cpus_synced(src_cpu, idxmap);
+ return;
+ }
/*
* If all bits are significant, and len is small,
* this devolves to tlb_flush_page.
*/
- if (bits >= TARGET_LONG_BITS && len <= TARGET_PAGE_SIZE) {
+ if (len <= TARGET_PAGE_SIZE && bits >= target_long_bits()) {
tlb_flush_page_by_mmuidx_all_cpus_synced(src_cpu, addr, idxmap);
return;
}
- /* If no page bits are significant, this devolves to tlb_flush. */
- if (bits < TARGET_PAGE_BITS) {
- tlb_flush_by_mmuidx_all_cpus_synced(src_cpu, idxmap);
- return;
- }
/* This should already be page aligned */
d.addr = addr & TARGET_PAGE_MASK;
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 04/11] accel/tcg: Use vaddr for plugin_{load,store}_cb
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (2 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 03/11] accel/tcg: Use target_long_bits() in cputlb.c Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:01 ` Pierrick Bouvier
2025-05-01 17:25 ` Philippe Mathieu-Daudé
2025-05-01 14:55 ` [PATCH 05/11] accel/tcg: Build cputlb.c once Richard Henderson
` (7 subsequent siblings)
11 siblings, 2 replies; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
Avoid the use of abi_ptr within ldst_common.c.inc.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/ldst_common.c.inc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc
index 9791a4e9ef..57f3e06192 100644
--- a/accel/tcg/ldst_common.c.inc
+++ b/accel/tcg/ldst_common.c.inc
@@ -123,7 +123,7 @@ void helper_st_i128(CPUArchState *env, uint64_t addr, Int128 val, MemOpIdx oi)
* Load helpers for cpu_ldst.h
*/
-static void plugin_load_cb(CPUArchState *env, abi_ptr addr,
+static void plugin_load_cb(CPUArchState *env, vaddr addr,
uint64_t value_low,
uint64_t value_high,
MemOpIdx oi)
@@ -193,7 +193,7 @@ Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr,
* Store helpers for cpu_ldst.h
*/
-static void plugin_store_cb(CPUArchState *env, abi_ptr addr,
+static void plugin_store_cb(CPUArchState *env, vaddr addr,
uint64_t value_low,
uint64_t value_high,
MemOpIdx oi)
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 05/11] accel/tcg: Build cputlb.c once
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (3 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 04/11] accel/tcg: Use vaddr for plugin_{load,store}_cb Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:01 ` Pierrick Bouvier
2025-05-01 17:26 ` Philippe Mathieu-Daudé
2025-05-01 14:55 ` [PATCH 06/11] include/user: Convert GUEST_ADDR_MAX to a variable Richard Henderson
` (6 subsequent siblings)
11 siblings, 2 replies; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cputlb.c | 3 ++-
accel/tcg/meson.build | 5 +----
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 35c467aace..5f6d7c601c 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -25,7 +25,8 @@
#include "accel/tcg/probe.h"
#include "exec/page-protection.h"
#include "system/memory.h"
-#include "accel/tcg/cpu-ldst.h"
+#include "accel/tcg/cpu-ldst-common.h"
+#include "accel/tcg/cpu-mmu-index.h"
#include "exec/cputlb.h"
#include "exec/tb-flush.h"
#include "system/ram_addr.h"
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index d6bd304add..9b86051b82 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -25,15 +25,12 @@ tcg_specific_ss = ss.source_set()
tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss)
-specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
- 'cputlb.c',
-))
-
libuser_ss.add(files(
'user-exec-stub.c',
))
libsystem_ss.add(files(
+ 'cputlb.c',
'icount-common.c',
'monitor.c',
'tcg-accel-ops.c',
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 06/11] include/user: Convert GUEST_ADDR_MAX to a variable
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (4 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 05/11] accel/tcg: Build cputlb.c once Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:02 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 07/11] include/user: Use vaddr in guest-host.h Richard Henderson
` (5 subsequent siblings)
11 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
Remove GUEST_ADDR_MAX and add guest_addr_max.
Initialize it in *-user/main.c, after reserved_va.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/user/guest-host.h | 27 +++++++--------------------
accel/tcg/user-exec.c | 4 ++--
bsd-user/main.c | 8 ++++++++
linux-user/main.c | 8 ++++++++
4 files changed, 25 insertions(+), 22 deletions(-)
diff --git a/include/user/guest-host.h b/include/user/guest-host.h
index 8d2079bbbb..8e10d36948 100644
--- a/include/user/guest-host.h
+++ b/include/user/guest-host.h
@@ -23,23 +23,11 @@
extern unsigned long reserved_va;
/*
- * Limit the guest addresses as best we can.
- *
- * When not using -R reserved_va, we cannot really limit the guest
- * to less address space than the host. For 32-bit guests, this
- * acts as a sanity check that we're not giving the guest an address
- * that it cannot even represent. For 64-bit guests... the address
- * might not be what the real kernel would give, but it is at least
- * representable in the guest.
- *
- * TODO: Improve address allocation to avoid this problem, and to
- * avoid setting bits at the top of guest addresses that might need
- * to be used for tags.
+ * The last byte of the guest address space.
+ * If reserved_va is non-zero, guest_addr_max matches.
+ * If reserved_va is zero, guest_addr_max equals the full guest space.
*/
-#define GUEST_ADDR_MAX_ \
- ((MIN_CONST(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) ? \
- UINT32_MAX : ~0ul)
-#define GUEST_ADDR_MAX (reserved_va ? : GUEST_ADDR_MAX_)
+extern unsigned long guest_addr_max;
#ifndef TARGET_TAGGED_ADDRESSES
static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x)
@@ -61,17 +49,16 @@ static inline void *g2h(CPUState *cs, abi_ptr x)
static inline bool guest_addr_valid_untagged(abi_ulong x)
{
- return x <= GUEST_ADDR_MAX;
+ return x <= guest_addr_max;
}
static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len)
{
- return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1;
+ return len - 1 <= guest_addr_max && start <= guest_addr_max - len + 1;
}
#define h2g_valid(x) \
- (HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS || \
- (uintptr_t)(x) - guest_base <= GUEST_ADDR_MAX)
+ ((uintptr_t)(x) - guest_base <= guest_addr_max)
#define h2g_nocheck(x) ({ \
uintptr_t __ret = (uintptr_t)(x) - guest_base; \
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index adc5296ba5..f674fd875e 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -500,7 +500,7 @@ void page_set_flags(vaddr start, vaddr last, int flags)
guest address space. If this assert fires, it probably indicates
a missing call to h2g_valid. */
assert(start <= last);
- assert(last <= GUEST_ADDR_MAX);
+ assert(last <= guest_addr_max);
/* Only set PAGE_ANON with new mappings. */
assert(!(flags & PAGE_ANON) || (flags & PAGE_RESET));
assert_memory_lock();
@@ -621,7 +621,7 @@ vaddr page_find_range_empty(vaddr min, vaddr max, vaddr len, vaddr align)
vaddr len_m1, align_m1;
assert(min <= max);
- assert(max <= GUEST_ADDR_MAX);
+ assert(max <= guest_addr_max);
assert(len != 0);
assert(is_power_of_2(align));
assert_memory_lock();
diff --git a/bsd-user/main.c b/bsd-user/main.c
index fa7645a56e..603fc80ba7 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -89,6 +89,7 @@ bool have_guest_base;
#endif
unsigned long reserved_va;
+unsigned long guest_addr_max;
const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
const char *qemu_uname_release;
@@ -500,6 +501,13 @@ int main(int argc, char **argv)
/* MAX_RESERVED_VA + 1 is a large power of 2, so is aligned. */
reserved_va = max_reserved_va;
}
+ if (reserved_va != 0) {
+ guest_addr_max = reserved_va;
+ } else if (MIN(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) {
+ guest_addr_max = UINT32_MAX;
+ } else {
+ guest_addr_max = ~0ul;
+ }
if (getenv("QEMU_STRACE")) {
do_strace = 1;
diff --git a/linux-user/main.c b/linux-user/main.c
index 4af7f49f38..5ac5b55dc6 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -122,6 +122,7 @@ static const char *last_log_filename;
#endif
unsigned long reserved_va;
+unsigned long guest_addr_max;
static void usage(int exitcode);
@@ -858,6 +859,13 @@ int main(int argc, char **argv, char **envp)
/* MAX_RESERVED_VA + 1 is a large power of 2, so is aligned. */
reserved_va = max_reserved_va;
}
+ if (reserved_va != 0) {
+ guest_addr_max = reserved_va;
+ } else if (MIN(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) {
+ guest_addr_max = UINT32_MAX;
+ } else {
+ guest_addr_max = ~0ul;
+ }
/*
* Temporarily disable
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 07/11] include/user: Use vaddr in guest-host.h
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (5 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 06/11] include/user: Convert GUEST_ADDR_MAX to a variable Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:03 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 08/11] accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr Richard Henderson
` (4 subsequent siblings)
11 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
Replace abi_ptr and abi_ulong with vaddr.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/user/guest-host.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/user/guest-host.h b/include/user/guest-host.h
index 8e10d36948..0656f2e356 100644
--- a/include/user/guest-host.h
+++ b/include/user/guest-host.h
@@ -8,7 +8,7 @@
#ifndef USER_GUEST_HOST_H
#define USER_GUEST_HOST_H
-#include "user/abitypes.h"
+#include "exec/vaddr.h"
#include "user/guest-base.h"
#include "cpu.h"
@@ -30,29 +30,29 @@ extern unsigned long reserved_va;
extern unsigned long guest_addr_max;
#ifndef TARGET_TAGGED_ADDRESSES
-static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x)
+static inline vaddr cpu_untagged_addr(CPUState *cs, vaddr x)
{
return x;
}
#endif
/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
-static inline void *g2h_untagged(abi_ptr x)
+static inline void *g2h_untagged(vaddr x)
{
return (void *)((uintptr_t)(x) + guest_base);
}
-static inline void *g2h(CPUState *cs, abi_ptr x)
+static inline void *g2h(CPUState *cs, vaddr x)
{
return g2h_untagged(cpu_untagged_addr(cs, x));
}
-static inline bool guest_addr_valid_untagged(abi_ulong x)
+static inline bool guest_addr_valid_untagged(vaddr x)
{
return x <= guest_addr_max;
}
-static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len)
+static inline bool guest_range_valid_untagged(vaddr start, vaddr len)
{
return len - 1 <= guest_addr_max && start <= guest_addr_max - len + 1;
}
@@ -62,7 +62,7 @@ static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len)
#define h2g_nocheck(x) ({ \
uintptr_t __ret = (uintptr_t)(x) - guest_base; \
- (abi_ptr)__ret; \
+ (vaddr)__ret; \
})
#define h2g(x) ({ \
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 08/11] accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (6 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 07/11] include/user: Use vaddr in guest-host.h Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:03 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 09/11] accel/tcg: Remove TARGET_PAGE_DATA_SIZE Richard Henderson
` (3 subsequent siblings)
11 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/accel/tcg/cpu-ops.h | 7 +++++++
include/user/guest-host.h | 8 +++++---
target/arm/cpu-param.h | 7 +------
target/arm/cpu.h | 32 +-------------------------------
target/arm/cpu.c | 27 ++++++++++++++++++++++++++-
5 files changed, 40 insertions(+), 41 deletions(-)
diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h
index 23cd6af0b2..cd22e5d5b9 100644
--- a/include/accel/tcg/cpu-ops.h
+++ b/include/accel/tcg/cpu-ops.h
@@ -157,6 +157,13 @@ struct TCGCPUOps {
*/
void (*record_sigbus)(CPUState *cpu, vaddr addr,
MMUAccessType access_type, uintptr_t ra);
+
+ /**
+ * untagged_addr: Remove an ignored tag from an address
+ * @cpu: cpu context
+ * @addr: tagged guest address
+ */
+ vaddr (*untagged_addr)(CPUState *cs, vaddr addr);
#else
/** @do_interrupt: Callback for interrupt handling. */
void (*do_interrupt)(CPUState *cpu);
diff --git a/include/user/guest-host.h b/include/user/guest-host.h
index 0656f2e356..8f7ef75896 100644
--- a/include/user/guest-host.h
+++ b/include/user/guest-host.h
@@ -10,7 +10,7 @@
#include "exec/vaddr.h"
#include "user/guest-base.h"
-#include "cpu.h"
+#include "accel/tcg/cpu-ops.h"
/*
* If non-zero, the guest virtual address space is a contiguous subset
@@ -29,12 +29,14 @@ extern unsigned long reserved_va;
*/
extern unsigned long guest_addr_max;
-#ifndef TARGET_TAGGED_ADDRESSES
static inline vaddr cpu_untagged_addr(CPUState *cs, vaddr x)
{
+ const TCGCPUOps *tcg_ops = cs->cc->tcg_ops;
+ if (tcg_ops->untagged_addr) {
+ return tcg_ops->untagged_addr(cs, x);
+ }
return x;
}
-#endif
/* All direct uses of g2h and h2g need to go away for usermode softmmu. */
static inline void *g2h_untagged(vaddr x)
diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h
index 5c5bc8a009..8b46c7c570 100644
--- a/target/arm/cpu-param.h
+++ b/target/arm/cpu-param.h
@@ -17,14 +17,9 @@
#endif
#ifdef CONFIG_USER_ONLY
-# ifdef TARGET_AARCH64
-# define TARGET_TAGGED_ADDRESSES
-# ifdef __FreeBSD__
-# define TARGET_PAGE_BITS 12
-# else
+# if defined(TARGET_AARCH64) && defined(CONFIG_LINUX)
/* Allow user-only to vary page size from 4k */
# define TARGET_PAGE_BITS_VARY
-# endif
# else
# define TARGET_PAGE_BITS 12
# endif
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index be4449ca06..23720b2b17 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -783,12 +783,9 @@ typedef struct CPUArchState {
#else /* CONFIG_USER_ONLY */
/* For usermode syscall translation. */
bool eabi;
-#endif /* CONFIG_USER_ONLY */
-
-#ifdef TARGET_TAGGED_ADDRESSES
/* Linux syscall tagged address support */
bool tagged_addr_enable;
-#endif
+#endif /* CONFIG_USER_ONLY */
} CPUARMState;
static inline void set_feature(CPUARMState *env, int feature)
@@ -3217,34 +3214,7 @@ extern const uint64_t pred_esz_masks[5];
#define TAG_GRANULE (1 << LOG2_TAG_GRANULE)
#ifdef CONFIG_USER_ONLY
-
#define TARGET_PAGE_DATA_SIZE (TARGET_PAGE_SIZE >> (LOG2_TAG_GRANULE + 1))
-
-#ifdef TARGET_TAGGED_ADDRESSES
-/**
- * cpu_untagged_addr:
- * @cs: CPU context
- * @x: tagged address
- *
- * Remove any address tag from @x. This is explicitly related to the
- * linux syscall TIF_TAGGED_ADDR setting, not TBI in general.
- *
- * There should be a better place to put this, but we need this in
- * include/exec/cpu_ldst.h, and not some place linux-user specific.
- */
-static inline target_ulong cpu_untagged_addr(CPUState *cs, target_ulong x)
-{
- CPUARMState *env = cpu_env(cs);
- if (env->tagged_addr_enable) {
- /*
- * TBI is enabled for userspace but not kernelspace addresses.
- * Only clear the tag if bit 55 is clear.
- */
- x &= sextract64(x, 0, 56);
- }
- return x;
-}
-#endif /* TARGET_TAGGED_ADDRESSES */
#endif /* CONFIG_USER_ONLY */
#endif
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 2020aec54a..45cb6fd7ee 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2671,7 +2671,31 @@ static const char *arm_gdb_get_core_xml_file(CPUState *cs)
return "arm-core.xml";
}
-#ifndef CONFIG_USER_ONLY
+#ifdef CONFIG_USER_ONLY
+/**
+ * aarch64_untagged_addr:
+ *
+ * Remove any address tag from @x. This is explicitly related to the
+ * linux syscall TIF_TAGGED_ADDR setting, not TBI in general.
+ *
+ * There should be a better place to put this, but we need this in
+ * include/exec/cpu_ldst.h, and not some place linux-user specific.
+ *
+ * Note that arm-*-user will never set tagged_addr_enable.
+ */
+static vaddr aarch64_untagged_addr(CPUState *cs, vaddr x)
+{
+ CPUARMState *env = cpu_env(cs);
+ if (env->tagged_addr_enable) {
+ /*
+ * TBI is enabled for userspace but not kernelspace addresses.
+ * Only clear the tag if bit 55 is clear.
+ */
+ x &= sextract64(x, 0, 56);
+ }
+ return x;
+}
+#else
#include "hw/core/sysemu-cpu-ops.h"
static const struct SysemuCPUOps arm_sysemu_ops = {
@@ -2702,6 +2726,7 @@ static const TCGCPUOps arm_tcg_ops = {
#ifdef CONFIG_USER_ONLY
.record_sigsegv = arm_cpu_record_sigsegv,
.record_sigbus = arm_cpu_record_sigbus,
+ .untagged_addr = aarch64_untagged_addr,
#else
.tlb_fill_align = arm_cpu_tlb_fill_align,
.cpu_exec_interrupt = arm_cpu_exec_interrupt,
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 09/11] accel/tcg: Remove TARGET_PAGE_DATA_SIZE
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (7 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 08/11] accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:06 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 10/11] accel/tcg: Avoid abi_ptr in user-exec.c Richard Henderson
` (2 subsequent siblings)
11 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
This macro is used by only one target, and even then under
unusual conditions -- AArch64 with mmap's PROT_MTE flag.
Since page size for aarch64-linux-user is variable, the
per-page data size is also variable.
Since page_reset_target_data via target_munmap does not
have ready access to CPUState, simply pass in the size
from the first allocation and remember that.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/user/page-protection.h | 8 +++++---
target/arm/cpu.h | 4 ----
accel/tcg/user-exec.c | 26 ++++++++++++++++----------
target/arm/tcg/mte_helper.c | 4 ++--
4 files changed, 23 insertions(+), 19 deletions(-)
diff --git a/include/user/page-protection.h b/include/user/page-protection.h
index 86143212fd..4bde664e4a 100644
--- a/include/user/page-protection.h
+++ b/include/user/page-protection.h
@@ -73,18 +73,20 @@ bool page_check_range_empty(vaddr start, vaddr last);
vaddr page_find_range_empty(vaddr min, vaddr max, vaddr len, vaddr align);
/**
- * page_get_target_data(address)
+ * page_get_target_data
* @address: guest virtual address
+ * @size: per-page size
*
- * Return TARGET_PAGE_DATA_SIZE bytes of out-of-band data to associate
+ * Return @size bytes of out-of-band data to associate
* with the guest page at @address, allocating it if necessary. The
* caller should already have verified that the address is valid.
+ * The value of @size must be the same for every call.
*
* The memory will be freed when the guest page is deallocated,
* e.g. with the munmap system call.
*/
__attribute__((returns_nonnull))
-void *page_get_target_data(vaddr address);
+void *page_get_target_data(vaddr address, size_t size);
typedef int (*walk_memory_regions_fn)(void *, vaddr, vaddr, int);
int walk_memory_regions(void *, walk_memory_regions_fn);
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 23720b2b17..6ed6409cb7 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3213,8 +3213,4 @@ extern const uint64_t pred_esz_masks[5];
#define LOG2_TAG_GRANULE 4
#define TAG_GRANULE (1 << LOG2_TAG_GRANULE)
-#ifdef CONFIG_USER_ONLY
-#define TARGET_PAGE_DATA_SIZE (TARGET_PAGE_SIZE >> (LOG2_TAG_GRANULE + 1))
-#endif /* CONFIG_USER_ONLY */
-
#endif
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index f674fd875e..46b1e97c30 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -870,7 +870,6 @@ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr,
return addr;
}
-#ifdef TARGET_PAGE_DATA_SIZE
/*
* Allocate chunks of target data together. For the only current user,
* if we allocate one hunk per page, we have overhead of 40/128 or 40%.
@@ -886,10 +885,16 @@ typedef struct TargetPageDataNode {
} TargetPageDataNode;
static IntervalTreeRoot targetdata_root;
+static size_t target_page_data_size;
void page_reset_target_data(vaddr start, vaddr last)
{
IntervalTreeNode *n, *next;
+ size_t size = target_page_data_size;
+
+ if (likely(size == 0)) {
+ return;
+ }
assert_memory_lock();
@@ -920,17 +925,22 @@ void page_reset_target_data(vaddr start, vaddr last)
n_last = MIN(last, n->last);
p_len = (n_last + 1 - n_start) >> TARGET_PAGE_BITS;
- memset(t->data + p_ofs * TARGET_PAGE_DATA_SIZE, 0,
- p_len * TARGET_PAGE_DATA_SIZE);
+ memset(t->data + p_ofs * size, 0, p_len * size);
}
}
-void *page_get_target_data(vaddr address)
+void *page_get_target_data(vaddr address, size_t size)
{
IntervalTreeNode *n;
TargetPageDataNode *t;
vaddr page, region, p_ofs;
+ /* Remember the size from the first call, and it should be constant. */
+ if (unlikely(target_page_data_size != size)) {
+ assert(target_page_data_size == 0);
+ target_page_data_size = size;
+ }
+
page = address & TARGET_PAGE_MASK;
region = address & TBD_MASK;
@@ -945,8 +955,7 @@ void *page_get_target_data(vaddr address)
mmap_lock();
n = interval_tree_iter_first(&targetdata_root, page, page);
if (!n) {
- t = g_malloc0(sizeof(TargetPageDataNode)
- + TPD_PAGES * TARGET_PAGE_DATA_SIZE);
+ t = g_malloc0(sizeof(TargetPageDataNode) + TPD_PAGES * size);
n = &t->itree;
n->start = region;
n->last = region | ~TBD_MASK;
@@ -957,11 +966,8 @@ void *page_get_target_data(vaddr address)
t = container_of(n, TargetPageDataNode, itree);
p_ofs = (page - region) >> TARGET_PAGE_BITS;
- return t->data + p_ofs * TARGET_PAGE_DATA_SIZE;
+ return t->data + p_ofs * size;
}
-#else
-void page_reset_target_data(vaddr start, vaddr last) { }
-#endif /* TARGET_PAGE_DATA_SIZE */
/* The system-mode versions of these helpers are in cputlb.c. */
diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c
index 13d7ac0097..0efc18a181 100644
--- a/target/arm/tcg/mte_helper.c
+++ b/target/arm/tcg/mte_helper.c
@@ -37,7 +37,6 @@
#include "qemu/guest-random.h"
#include "mte_helper.h"
-
static int choose_nonexcluded_tag(int tag, int offset, uint16_t exclude)
{
if (exclude == 0xffff) {
@@ -63,6 +62,7 @@ uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx,
bool probe, uintptr_t ra)
{
#ifdef CONFIG_USER_ONLY
+ const size_t page_data_size = TARGET_PAGE_SIZE >> (LOG2_TAG_GRANULE + 1);
uint64_t clean_ptr = useronly_clean_ptr(ptr);
int flags = page_get_flags(clean_ptr);
uint8_t *tags;
@@ -83,7 +83,7 @@ uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx,
return NULL;
}
- tags = page_get_target_data(clean_ptr);
+ tags = page_get_target_data(clean_ptr, page_data_size);
index = extract32(ptr, LOG2_TAG_GRANULE + 1,
TARGET_PAGE_BITS - LOG2_TAG_GRANULE - 1);
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 10/11] accel/tcg: Avoid abi_ptr in user-exec.c
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (8 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 09/11] accel/tcg: Remove TARGET_PAGE_DATA_SIZE Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:04 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 11/11] accel/tcg: Build user-exec.c once Richard Henderson
2025-05-01 16:07 ` [PATCH 00/11] accel/tcg: Finish building once Pierrick Bouvier
11 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
In page_dump/dump_region, use guest_addr_max to check the
size of the guest address space and size the output
appropriately. This will change output with small values
of -R reserved_va, but shouldn't affect anything else.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/user-exec.c | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 46b1e97c30..085da0c036 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -29,6 +29,7 @@
#include "accel/tcg/helper-retaddr.h"
#include "accel/tcg/probe.h"
#include "user/cpu_loop.h"
+#include "user/guest-host.h"
#include "qemu/main-loop.h"
#include "user/page-protection.h"
#include "exec/page-protection.h"
@@ -202,10 +203,19 @@ int walk_memory_regions(void *priv, walk_memory_regions_fn fn)
static int dump_region(void *opaque, vaddr start, vaddr end, int prot)
{
FILE *f = opaque;
+ uint64_t mask;
+ int width;
- fprintf(f, TARGET_ABI_FMT_ptr "-" TARGET_ABI_FMT_ptr
- " " TARGET_ABI_FMT_ptr " %c%c%c\n",
- (abi_ptr)start, (abi_ptr)end, (abi_ptr)(end - start),
+ if (guest_addr_max <= UINT32_MAX) {
+ mask = UINT32_MAX, width = 8;
+ } else {
+ mask = UINT64_MAX, width = 16;
+ }
+
+ fprintf(f, "%0*" PRIx64 "-%0*" PRIx64 " %0*" PRIx64 " %c%c%c\n",
+ width, start & mask,
+ width, end & mask,
+ width, (end - start) & mask,
((prot & PAGE_READ) ? 'r' : '-'),
((prot & PAGE_WRITE) ? 'w' : '-'),
((prot & PAGE_EXEC) ? 'x' : '-'));
@@ -215,10 +225,10 @@ static int dump_region(void *opaque, vaddr start, vaddr end, int prot)
/* dump memory mappings */
void page_dump(FILE *f)
{
- const int length = sizeof(abi_ptr) * 2;
+ int width = guest_addr_max <= UINT32_MAX ? 8 : 16;
fprintf(f, "%-*s %-*s %-*s %s\n",
- length, "start", length, "end", length, "size", "prot");
+ width, "start", width, "end", width, "size", "prot");
walk_memory_regions(f, dump_region);
}
@@ -1135,7 +1145,7 @@ static uint64_t do_ld8_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
return ret;
}
-static Int128 do_ld16_mmu(CPUState *cpu, abi_ptr addr,
+static Int128 do_ld16_mmu(CPUState *cpu, vaddr addr,
MemOpIdx oi, uintptr_t ra)
{
void *haddr;
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 11/11] accel/tcg: Build user-exec.c once
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (9 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 10/11] accel/tcg: Avoid abi_ptr in user-exec.c Richard Henderson
@ 2025-05-01 14:55 ` Richard Henderson
2025-05-01 16:05 ` Pierrick Bouvier
2025-05-01 16:07 ` [PATCH 00/11] accel/tcg: Finish building once Pierrick Bouvier
11 siblings, 1 reply; 27+ messages in thread
From: Richard Henderson @ 2025-05-01 14:55 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/user-exec.c | 5 ++---
accel/tcg/meson.build | 5 +----
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 085da0c036..f25d80e2dc 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -19,13 +19,12 @@
#include "qemu/osdep.h"
#include "accel/tcg/cpu-ops.h"
#include "disas/disas.h"
-#include "cpu.h"
#include "exec/vaddr.h"
#include "exec/tlb-flags.h"
#include "tcg/tcg.h"
#include "qemu/bitops.h"
#include "qemu/rcu.h"
-#include "accel/tcg/cpu-ldst.h"
+#include "accel/tcg/cpu-ldst-common.h"
#include "accel/tcg/helper-retaddr.h"
#include "accel/tcg/probe.h"
#include "user/cpu_loop.h"
@@ -33,7 +32,7 @@
#include "qemu/main-loop.h"
#include "user/page-protection.h"
#include "exec/page-protection.h"
-#include "exec/helper-proto.h"
+#include "exec/helper-proto-common.h"
#include "qemu/atomic128.h"
#include "qemu/bswap.h"
#include "qemu/int128.h"
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 9b86051b82..d6f533f9a1 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -21,11 +21,8 @@ endif
libuser_ss.add_all(tcg_ss)
libsystem_ss.add_all(tcg_ss)
-tcg_specific_ss = ss.source_set()
-tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
-specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss)
-
libuser_ss.add(files(
+ 'user-exec.c',
'user-exec-stub.c',
))
--
2.43.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 01/11] accel/tcg: Move user-only tlb_vaddr_to_host out of line
2025-05-01 14:55 ` [PATCH 01/11] accel/tcg: Move user-only tlb_vaddr_to_host out of line Richard Henderson
@ 2025-05-01 15:59 ` Pierrick Bouvier
0 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 15:59 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> At the same time, fix a mis-match between user and system
> by using vaddr not abi_ptr for the address parameter.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/accel/tcg/cpu-ldst.h | 8 --------
> accel/tcg/user-exec.c | 6 ++++++
> 2 files changed, 6 insertions(+), 8 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
2025-05-01 14:55 ` [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h Richard Henderson
@ 2025-05-01 16:00 ` Pierrick Bouvier
2025-05-01 17:24 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:00 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> This is a probing function, not a load/store function.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/accel/tcg/cpu-ldst.h | 16 ----------------
> include/accel/tcg/probe.h | 16 ++++++++++++++++
> 2 files changed, 16 insertions(+), 16 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 03/11] accel/tcg: Use target_long_bits() in cputlb.c
2025-05-01 14:55 ` [PATCH 03/11] accel/tcg: Use target_long_bits() in cputlb.c Richard Henderson
@ 2025-05-01 16:01 ` Pierrick Bouvier
0 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:01 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/cputlb.c | 25 +++++++++++++------------
> 1 file changed, 13 insertions(+), 12 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 04/11] accel/tcg: Use vaddr for plugin_{load,store}_cb
2025-05-01 14:55 ` [PATCH 04/11] accel/tcg: Use vaddr for plugin_{load,store}_cb Richard Henderson
@ 2025-05-01 16:01 ` Pierrick Bouvier
2025-05-01 17:25 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:01 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> Avoid the use of abi_ptr within ldst_common.c.inc.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/ldst_common.c.inc | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 05/11] accel/tcg: Build cputlb.c once
2025-05-01 14:55 ` [PATCH 05/11] accel/tcg: Build cputlb.c once Richard Henderson
@ 2025-05-01 16:01 ` Pierrick Bouvier
2025-05-01 17:26 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:01 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/cputlb.c | 3 ++-
> accel/tcg/meson.build | 5 +----
> 2 files changed, 3 insertions(+), 5 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 06/11] include/user: Convert GUEST_ADDR_MAX to a variable
2025-05-01 14:55 ` [PATCH 06/11] include/user: Convert GUEST_ADDR_MAX to a variable Richard Henderson
@ 2025-05-01 16:02 ` Pierrick Bouvier
0 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:02 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> Remove GUEST_ADDR_MAX and add guest_addr_max.
> Initialize it in *-user/main.c, after reserved_va.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/user/guest-host.h | 27 +++++++--------------------
> accel/tcg/user-exec.c | 4 ++--
> bsd-user/main.c | 8 ++++++++
> linux-user/main.c | 8 ++++++++
> 4 files changed, 25 insertions(+), 22 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 07/11] include/user: Use vaddr in guest-host.h
2025-05-01 14:55 ` [PATCH 07/11] include/user: Use vaddr in guest-host.h Richard Henderson
@ 2025-05-01 16:03 ` Pierrick Bouvier
0 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:03 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> Replace abi_ptr and abi_ulong with vaddr.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/user/guest-host.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 08/11] accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr
2025-05-01 14:55 ` [PATCH 08/11] accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr Richard Henderson
@ 2025-05-01 16:03 ` Pierrick Bouvier
0 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:03 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/accel/tcg/cpu-ops.h | 7 +++++++
> include/user/guest-host.h | 8 +++++---
> target/arm/cpu-param.h | 7 +------
> target/arm/cpu.h | 32 +-------------------------------
> target/arm/cpu.c | 27 ++++++++++++++++++++++++++-
> 5 files changed, 40 insertions(+), 41 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 10/11] accel/tcg: Avoid abi_ptr in user-exec.c
2025-05-01 14:55 ` [PATCH 10/11] accel/tcg: Avoid abi_ptr in user-exec.c Richard Henderson
@ 2025-05-01 16:04 ` Pierrick Bouvier
0 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:04 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> In page_dump/dump_region, use guest_addr_max to check the
> size of the guest address space and size the output
> appropriately. This will change output with small values
> of -R reserved_va, but shouldn't affect anything else.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/user-exec.c | 22 ++++++++++++++++------
> 1 file changed, 16 insertions(+), 6 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 11/11] accel/tcg: Build user-exec.c once
2025-05-01 14:55 ` [PATCH 11/11] accel/tcg: Build user-exec.c once Richard Henderson
@ 2025-05-01 16:05 ` Pierrick Bouvier
0 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:05 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/user-exec.c | 5 ++---
> accel/tcg/meson.build | 5 +----
> 2 files changed, 3 insertions(+), 7 deletions(-)
Yeah!
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 09/11] accel/tcg: Remove TARGET_PAGE_DATA_SIZE
2025-05-01 14:55 ` [PATCH 09/11] accel/tcg: Remove TARGET_PAGE_DATA_SIZE Richard Henderson
@ 2025-05-01 16:06 ` Pierrick Bouvier
0 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:06 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> This macro is used by only one target, and even then under
> unusual conditions -- AArch64 with mmap's PROT_MTE flag.
>
> Since page size for aarch64-linux-user is variable, the
> per-page data size is also variable.
> Since page_reset_target_data via target_munmap does not
> have ready access to CPUState, simply pass in the size
> from the first allocation and remember that.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/user/page-protection.h | 8 +++++---
> target/arm/cpu.h | 4 ----
> accel/tcg/user-exec.c | 26 ++++++++++++++++----------
> target/arm/tcg/mte_helper.c | 4 ++--
> 4 files changed, 23 insertions(+), 19 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 00/11] accel/tcg: Finish building once
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
` (10 preceding siblings ...)
2025-05-01 14:55 ` [PATCH 11/11] accel/tcg: Build user-exec.c once Richard Henderson
@ 2025-05-01 16:07 ` Pierrick Bouvier
11 siblings, 0 replies; 27+ messages in thread
From: Pierrick Bouvier @ 2025-05-01 16:07 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 5/1/25 7:55 AM, Richard Henderson wrote:
> Based-on: 20250430230631.2571291-1-richard.henderson@linaro.org
> ("[PATCH 0/6] accel/tcg: Build translate-all, tcg-all twice")
>
> Adjust the final two files in accel/tcg/ to build once.
>
Congrats!
>
> r~
>
>
> Richard Henderson (11):
> accel/tcg: Move user-only tlb_vaddr_to_host out of line
> accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
> accel/tcg: Use target_long_bits() in cputlb.c
> accel/tcg: Use vaddr for plugin_{load,store}_cb
> accel/tcg: Build cputlb.c once
> include/user: Convert GUEST_ADDR_MAX to a variable
> include/user: Use vaddr in guest-host.h
> accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr
> accel/tcg: Remove TARGET_PAGE_DATA_SIZE
> accel/tcg: Avoid abi_ptr in user-exec.c
> accel/tcg: Build user-exec.c once
>
> include/accel/tcg/cpu-ldst.h | 24 -------------
> include/accel/tcg/cpu-ops.h | 7 ++++
> include/accel/tcg/probe.h | 16 +++++++++
> include/user/guest-host.h | 49 ++++++++++----------------
> include/user/page-protection.h | 8 +++--
> target/arm/cpu-param.h | 7 +---
> target/arm/cpu.h | 36 +------------------
> accel/tcg/cputlb.c | 28 ++++++++-------
> accel/tcg/user-exec.c | 63 ++++++++++++++++++++++------------
> bsd-user/main.c | 8 +++++
> linux-user/main.c | 8 +++++
> target/arm/cpu.c | 27 ++++++++++++++-
> target/arm/tcg/mte_helper.c | 4 +--
> accel/tcg/ldst_common.c.inc | 4 +--
> accel/tcg/meson.build | 10 ++----
> 15 files changed, 154 insertions(+), 145 deletions(-)
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h
2025-05-01 14:55 ` [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h Richard Henderson
2025-05-01 16:00 ` Pierrick Bouvier
@ 2025-05-01 17:24 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 27+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-05-01 17:24 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 1/5/25 16:55, Richard Henderson wrote:
> This is a probing function, not a load/store function.
TIL.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/accel/tcg/cpu-ldst.h | 16 ----------------
> include/accel/tcg/probe.h | 16 ++++++++++++++++
> 2 files changed, 16 insertions(+), 16 deletions(-)
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 04/11] accel/tcg: Use vaddr for plugin_{load,store}_cb
2025-05-01 14:55 ` [PATCH 04/11] accel/tcg: Use vaddr for plugin_{load,store}_cb Richard Henderson
2025-05-01 16:01 ` Pierrick Bouvier
@ 2025-05-01 17:25 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 27+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-05-01 17:25 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 1/5/25 16:55, Richard Henderson wrote:
> Avoid the use of abi_ptr within ldst_common.c.inc.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/ldst_common.c.inc | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 05/11] accel/tcg: Build cputlb.c once
2025-05-01 14:55 ` [PATCH 05/11] accel/tcg: Build cputlb.c once Richard Henderson
2025-05-01 16:01 ` Pierrick Bouvier
@ 2025-05-01 17:26 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 27+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-05-01 17:26 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 1/5/25 16:55, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/cputlb.c | 3 ++-
> accel/tcg/meson.build | 5 +----
> 2 files changed, 3 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
:)
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2025-05-01 17:26 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-05-01 14:55 [PATCH 00/11] accel/tcg: Finish building once Richard Henderson
2025-05-01 14:55 ` [PATCH 01/11] accel/tcg: Move user-only tlb_vaddr_to_host out of line Richard Henderson
2025-05-01 15:59 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 02/11] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h Richard Henderson
2025-05-01 16:00 ` Pierrick Bouvier
2025-05-01 17:24 ` Philippe Mathieu-Daudé
2025-05-01 14:55 ` [PATCH 03/11] accel/tcg: Use target_long_bits() in cputlb.c Richard Henderson
2025-05-01 16:01 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 04/11] accel/tcg: Use vaddr for plugin_{load,store}_cb Richard Henderson
2025-05-01 16:01 ` Pierrick Bouvier
2025-05-01 17:25 ` Philippe Mathieu-Daudé
2025-05-01 14:55 ` [PATCH 05/11] accel/tcg: Build cputlb.c once Richard Henderson
2025-05-01 16:01 ` Pierrick Bouvier
2025-05-01 17:26 ` Philippe Mathieu-Daudé
2025-05-01 14:55 ` [PATCH 06/11] include/user: Convert GUEST_ADDR_MAX to a variable Richard Henderson
2025-05-01 16:02 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 07/11] include/user: Use vaddr in guest-host.h Richard Henderson
2025-05-01 16:03 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 08/11] accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr Richard Henderson
2025-05-01 16:03 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 09/11] accel/tcg: Remove TARGET_PAGE_DATA_SIZE Richard Henderson
2025-05-01 16:06 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 10/11] accel/tcg: Avoid abi_ptr in user-exec.c Richard Henderson
2025-05-01 16:04 ` Pierrick Bouvier
2025-05-01 14:55 ` [PATCH 11/11] accel/tcg: Build user-exec.c once Richard Henderson
2025-05-01 16:05 ` Pierrick Bouvier
2025-05-01 16:07 ` [PATCH 00/11] accel/tcg: Finish building once Pierrick Bouvier
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