From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
qemu-devel@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <eduardo@habkost.net>
Subject: Re: [PATCH] target/i386: Fix #GP error code for INT instructions
Date: Fri, 12 Dec 2025 01:26:59 +0000 [thread overview]
Message-ID: <4ee33a7d-a16c-4f04-9b5d-f9069a63cc17@citrix.com> (raw)
In-Reply-To: <20251212012552.1275269-2-pbonzini@redhat.com>
On 12/12/2025 1:25 am, Paolo Bonzini wrote:
>> While the (intno << shift) expression is correct for indexing the IDT based on
>> whether Long Mode is active, the error code itself was unchanged with AMD64,
>> and is still the index with 3 bits of metadata in the bottom.
> Queued, thanks. I'm really sorry about the delay.
No worries. Thanks.
~Andrew
prev parent reply other threads:[~2025-12-12 1:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-12 0:06 [PATCH] target/i386: Fix #GP error code for INT instructions Andrew Cooper
2025-05-20 16:32 ` Andrew Cooper
2025-07-25 12:01 ` [PING] " Andrew Cooper
2025-08-29 10:06 ` [PING ^ 2] " Andrew Cooper
2025-12-12 1:25 ` Paolo Bonzini
2025-12-12 1:26 ` Andrew Cooper [this message]
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