* [PATCH] target/i386: Fix #GP error code for INT instructions
@ 2025-03-12 0:06 Andrew Cooper
2025-05-20 16:32 ` Andrew Cooper
2025-12-12 1:25 ` Paolo Bonzini
0 siblings, 2 replies; 6+ messages in thread
From: Andrew Cooper @ 2025-03-12 0:06 UTC (permalink / raw)
To: qemu-devel
Cc: Andrew Cooper, Paolo Bonzini, Richard Henderson, Eduardo Habkost
While the (intno << shift) expression is correct for indexing the IDT based on
whether Long Mode is active, the error code itself was unchanged with AMD64,
and is still the index with 3 bits of metadata in the bottom.
Found when running a Xen unit test, all under QEMU. The unit test objected to
being told there was an error with IDT index 256 when INT $0x80 (128) was the
problem instruction:
...
Error: Unexpected fault 0x800d0802, #GP[IDT[256]]
...
Fixes: d2fd1af76777 ("x86_64 linux user emulation")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Richard Henderson <richard.henderson@linaro.org>
CC: Eduardo Habkost <eduardo@habkost.net>
---
target/i386/tcg/user/seg_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/tcg/user/seg_helper.c b/target/i386/tcg/user/seg_helper.c
index c45f2ac2ba68..ff328b2a9522 100644
--- a/target/i386/tcg/user/seg_helper.c
+++ b/target/i386/tcg/user/seg_helper.c
@@ -64,7 +64,7 @@ static void do_interrupt_user(CPUX86State *env, int intno, int is_int,
cpl = env->hflags & HF_CPL_MASK;
/* check privilege if software int */
if (dpl < cpl) {
- raise_exception_err(env, EXCP0D_GPF, (intno << shift) + 2);
+ raise_exception_err(env, EXCP0D_GPF, intno * 8 + 2);
}
}
base-commit: 825b96dbcee23d134b691fc75618b59c5f53da32
--
2.39.5
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH] target/i386: Fix #GP error code for INT instructions
2025-03-12 0:06 [PATCH] target/i386: Fix #GP error code for INT instructions Andrew Cooper
@ 2025-05-20 16:32 ` Andrew Cooper
2025-07-25 12:01 ` [PING] " Andrew Cooper
2025-12-12 1:25 ` Paolo Bonzini
1 sibling, 1 reply; 6+ messages in thread
From: Andrew Cooper @ 2025-05-20 16:32 UTC (permalink / raw)
To: qemu-devel; +Cc: Paolo Bonzini, Richard Henderson, Eduardo Habkost
Ping?
On 12/03/2025 12:06 am, Andrew Cooper wrote:
> While the (intno << shift) expression is correct for indexing the IDT based on
> whether Long Mode is active, the error code itself was unchanged with AMD64,
> and is still the index with 3 bits of metadata in the bottom.
>
> Found when running a Xen unit test, all under QEMU. The unit test objected to
> being told there was an error with IDT index 256 when INT $0x80 (128) was the
> problem instruction:
>
> ...
> Error: Unexpected fault 0x800d0802, #GP[IDT[256]]
> ...
>
> Fixes: d2fd1af76777 ("x86_64 linux user emulation")
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
> CC: Paolo Bonzini <pbonzini@redhat.com>
> CC: Richard Henderson <richard.henderson@linaro.org>
> CC: Eduardo Habkost <eduardo@habkost.net>
> ---
> target/i386/tcg/user/seg_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/i386/tcg/user/seg_helper.c b/target/i386/tcg/user/seg_helper.c
> index c45f2ac2ba68..ff328b2a9522 100644
> --- a/target/i386/tcg/user/seg_helper.c
> +++ b/target/i386/tcg/user/seg_helper.c
> @@ -64,7 +64,7 @@ static void do_interrupt_user(CPUX86State *env, int intno, int is_int,
> cpl = env->hflags & HF_CPL_MASK;
> /* check privilege if software int */
> if (dpl < cpl) {
> - raise_exception_err(env, EXCP0D_GPF, (intno << shift) + 2);
> + raise_exception_err(env, EXCP0D_GPF, intno * 8 + 2);
> }
> }
>
>
> base-commit: 825b96dbcee23d134b691fc75618b59c5f53da32
^ permalink raw reply [flat|nested] 6+ messages in thread* [PING] Re: [PATCH] target/i386: Fix #GP error code for INT instructions
2025-05-20 16:32 ` Andrew Cooper
@ 2025-07-25 12:01 ` Andrew Cooper
2025-08-29 10:06 ` [PING ^ 2] " Andrew Cooper
0 siblings, 1 reply; 6+ messages in thread
From: Andrew Cooper @ 2025-07-25 12:01 UTC (permalink / raw)
To: qemu-devel; +Cc: Paolo Bonzini, Richard Henderson, Eduardo Habkost
Ping again?
~Andrew
On 20/05/2025 5:32 pm, Andrew Cooper wrote:
> Ping?
>
> On 12/03/2025 12:06 am, Andrew Cooper wrote:
>> While the (intno << shift) expression is correct for indexing the IDT based on
>> whether Long Mode is active, the error code itself was unchanged with AMD64,
>> and is still the index with 3 bits of metadata in the bottom.
>>
>> Found when running a Xen unit test, all under QEMU. The unit test objected to
>> being told there was an error with IDT index 256 when INT $0x80 (128) was the
>> problem instruction:
>>
>> ...
>> Error: Unexpected fault 0x800d0802, #GP[IDT[256]]
>> ...
>>
>> Fixes: d2fd1af76777 ("x86_64 linux user emulation")
>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
>> ---
>> CC: Paolo Bonzini <pbonzini@redhat.com>
>> CC: Richard Henderson <richard.henderson@linaro.org>
>> CC: Eduardo Habkost <eduardo@habkost.net>
>> ---
>> target/i386/tcg/user/seg_helper.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/target/i386/tcg/user/seg_helper.c b/target/i386/tcg/user/seg_helper.c
>> index c45f2ac2ba68..ff328b2a9522 100644
>> --- a/target/i386/tcg/user/seg_helper.c
>> +++ b/target/i386/tcg/user/seg_helper.c
>> @@ -64,7 +64,7 @@ static void do_interrupt_user(CPUX86State *env, int intno, int is_int,
>> cpl = env->hflags & HF_CPL_MASK;
>> /* check privilege if software int */
>> if (dpl < cpl) {
>> - raise_exception_err(env, EXCP0D_GPF, (intno << shift) + 2);
>> + raise_exception_err(env, EXCP0D_GPF, intno * 8 + 2);
>> }
>> }
>>
>>
>> base-commit: 825b96dbcee23d134b691fc75618b59c5f53da32
^ permalink raw reply [flat|nested] 6+ messages in thread* [PING ^ 2] Re: [PATCH] target/i386: Fix #GP error code for INT instructions
2025-07-25 12:01 ` [PING] " Andrew Cooper
@ 2025-08-29 10:06 ` Andrew Cooper
0 siblings, 0 replies; 6+ messages in thread
From: Andrew Cooper @ 2025-08-29 10:06 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, Richard Henderson, Eduardo Habkost, Zhao Liu,
Marcelo Tosatti, Cameron Esfahani, Roman Bolshakov,
Phil Dennis-Jordan, Wei Liu
Trying some other x86 maintainers this time...
~Andrew
On 25/07/2025 1:01 pm, Andrew Cooper wrote:
> Ping again?
>
> ~Andrew
>
> On 20/05/2025 5:32 pm, Andrew Cooper wrote:
>> Ping?
>>
>> On 12/03/2025 12:06 am, Andrew Cooper wrote:
>>> While the (intno << shift) expression is correct for indexing the IDT based on
>>> whether Long Mode is active, the error code itself was unchanged with AMD64,
>>> and is still the index with 3 bits of metadata in the bottom.
>>>
>>> Found when running a Xen unit test, all under QEMU. The unit test objected to
>>> being told there was an error with IDT index 256 when INT $0x80 (128) was the
>>> problem instruction:
>>>
>>> ...
>>> Error: Unexpected fault 0x800d0802, #GP[IDT[256]]
>>> ...
>>>
>>> Fixes: d2fd1af76777 ("x86_64 linux user emulation")
>>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
>>> ---
>>> CC: Paolo Bonzini <pbonzini@redhat.com>
>>> CC: Richard Henderson <richard.henderson@linaro.org>
>>> CC: Eduardo Habkost <eduardo@habkost.net>
>>> ---
>>> target/i386/tcg/user/seg_helper.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/target/i386/tcg/user/seg_helper.c b/target/i386/tcg/user/seg_helper.c
>>> index c45f2ac2ba68..ff328b2a9522 100644
>>> --- a/target/i386/tcg/user/seg_helper.c
>>> +++ b/target/i386/tcg/user/seg_helper.c
>>> @@ -64,7 +64,7 @@ static void do_interrupt_user(CPUX86State *env, int intno, int is_int,
>>> cpl = env->hflags & HF_CPL_MASK;
>>> /* check privilege if software int */
>>> if (dpl < cpl) {
>>> - raise_exception_err(env, EXCP0D_GPF, (intno << shift) + 2);
>>> + raise_exception_err(env, EXCP0D_GPF, intno * 8 + 2);
>>> }
>>> }
>>>
>>>
>>> base-commit: 825b96dbcee23d134b691fc75618b59c5f53da32
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] target/i386: Fix #GP error code for INT instructions
2025-03-12 0:06 [PATCH] target/i386: Fix #GP error code for INT instructions Andrew Cooper
2025-05-20 16:32 ` Andrew Cooper
@ 2025-12-12 1:25 ` Paolo Bonzini
2025-12-12 1:26 ` Andrew Cooper
1 sibling, 1 reply; 6+ messages in thread
From: Paolo Bonzini @ 2025-12-12 1:25 UTC (permalink / raw)
To: Andrew Cooper; +Cc: qemu-devel, Richard Henderson, Eduardo Habkost
> While the (intno << shift) expression is correct for indexing the IDT based on
> whether Long Mode is active, the error code itself was unchanged with AMD64,
> and is still the index with 3 bits of metadata in the bottom.
Queued, thanks. I'm really sorry about the delay.
Paolo
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] target/i386: Fix #GP error code for INT instructions
2025-12-12 1:25 ` Paolo Bonzini
@ 2025-12-12 1:26 ` Andrew Cooper
0 siblings, 0 replies; 6+ messages in thread
From: Andrew Cooper @ 2025-12-12 1:26 UTC (permalink / raw)
To: Paolo Bonzini
Cc: Andrew Cooper, qemu-devel, Richard Henderson, Eduardo Habkost
On 12/12/2025 1:25 am, Paolo Bonzini wrote:
>> While the (intno << shift) expression is correct for indexing the IDT based on
>> whether Long Mode is active, the error code itself was unchanged with AMD64,
>> and is still the index with 3 bits of metadata in the bottom.
> Queued, thanks. I'm really sorry about the delay.
No worries. Thanks.
~Andrew
^ permalink raw reply [flat|nested] 6+ messages in thread
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2025-03-12 0:06 [PATCH] target/i386: Fix #GP error code for INT instructions Andrew Cooper
2025-05-20 16:32 ` Andrew Cooper
2025-07-25 12:01 ` [PING] " Andrew Cooper
2025-08-29 10:06 ` [PING ^ 2] " Andrew Cooper
2025-12-12 1:25 ` Paolo Bonzini
2025-12-12 1:26 ` Andrew Cooper
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