* [RFC PATCH v1 01/19] target/i386/hvf: fix a typo in a type name
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 14:47 ` Philippe Mathieu-Daudé
2025-02-21 8:36 ` [RFC PATCH v1 02/19] target/i386/hvf: fix the declaration of hvf_handle_io Wei Liu
` (20 subsequent siblings)
21 siblings, 1 reply; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
The prefix x68 is wrong. Change it to x86.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf.c | 2 +-
target/i386/hvf/x86.c | 4 ++--
target/i386/hvf/x86.h | 8 ++++----
target/i386/hvf/x86_descr.c | 8 ++++----
target/i386/hvf/x86_descr.h | 6 +++---
target/i386/hvf/x86_task.c | 22 +++++++++++-----------
target/i386/hvf/x86_task.h | 2 +-
7 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index ca08f0753f..353549fa77 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -674,7 +674,7 @@ int hvf_vcpu_exec(CPUState *cpu)
}
case EXIT_REASON_TASK_SWITCH: {
uint64_t vinfo = rvmcs(cpu->accel->fd, VMCS_IDT_VECTORING_INFO);
- x68_segment_selector sel = {.sel = exit_qual & 0xffff};
+ x86_segment_selector sel = {.sel = exit_qual & 0xffff};
vmx_handle_task_switch(cpu, sel, (exit_qual >> 30) & 0x3,
vinfo & VMCS_INTR_VALID, vinfo & VECTORING_INFO_VECTOR_MASK, vinfo
& VMCS_INTR_T_MASK);
diff --git a/target/i386/hvf/x86.c b/target/i386/hvf/x86.c
index 80e36136d0..a0ede13886 100644
--- a/target/i386/hvf/x86.c
+++ b/target/i386/hvf/x86.c
@@ -48,7 +48,7 @@
bool x86_read_segment_descriptor(CPUState *cpu,
struct x86_segment_descriptor *desc,
- x68_segment_selector sel)
+ x86_segment_selector sel)
{
target_ulong base;
uint32_t limit;
@@ -78,7 +78,7 @@ bool x86_read_segment_descriptor(CPUState *cpu,
bool x86_write_segment_descriptor(CPUState *cpu,
struct x86_segment_descriptor *desc,
- x68_segment_selector sel)
+ x86_segment_selector sel)
{
target_ulong base;
uint32_t limit;
diff --git a/target/i386/hvf/x86.h b/target/i386/hvf/x86.h
index 3570f29aa9..063cd0b83e 100644
--- a/target/i386/hvf/x86.h
+++ b/target/i386/hvf/x86.h
@@ -183,7 +183,7 @@ static inline uint32_t x86_call_gate_offset(x86_call_gate *gate)
#define GDT_SEL 0
#define LDT_SEL 1
-typedef struct x68_segment_selector {
+typedef struct x86_segment_selector {
union {
uint16_t sel;
struct {
@@ -192,7 +192,7 @@ typedef struct x68_segment_selector {
uint16_t index:13;
};
};
-} __attribute__ ((__packed__)) x68_segment_selector;
+} __attribute__ ((__packed__)) x86_segment_selector;
/* useful register access macros */
#define x86_reg(cpu, reg) ((x86_register *) &cpu->regs[reg])
@@ -250,10 +250,10 @@ typedef struct x68_segment_selector {
/* deal with GDT/LDT descriptors in memory */
bool x86_read_segment_descriptor(CPUState *cpu,
struct x86_segment_descriptor *desc,
- x68_segment_selector sel);
+ x86_segment_selector sel);
bool x86_write_segment_descriptor(CPUState *cpu,
struct x86_segment_descriptor *desc,
- x68_segment_selector sel);
+ x86_segment_selector sel);
bool x86_read_call_gate(CPUState *cpu, struct x86_call_gate *idt_desc,
int gate);
diff --git a/target/i386/hvf/x86_descr.c b/target/i386/hvf/x86_descr.c
index f33836d6cb..7b599c9037 100644
--- a/target/i386/hvf/x86_descr.c
+++ b/target/i386/hvf/x86_descr.c
@@ -60,14 +60,14 @@ uint64_t vmx_read_segment_base(CPUState *cpu, X86Seg seg)
return rvmcs(cpu->accel->fd, vmx_segment_fields[seg].base);
}
-x68_segment_selector vmx_read_segment_selector(CPUState *cpu, X86Seg seg)
+x86_segment_selector vmx_read_segment_selector(CPUState *cpu, X86Seg seg)
{
- x68_segment_selector sel;
+ x86_segment_selector sel;
sel.sel = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector);
return sel;
}
-void vmx_write_segment_selector(CPUState *cpu, x68_segment_selector selector, X86Seg seg)
+void vmx_write_segment_selector(CPUState *cpu, x86_segment_selector selector, X86Seg seg)
{
wvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector, selector.sel);
}
@@ -90,7 +90,7 @@ void vmx_write_segment_descriptor(CPUState *cpu, struct vmx_segment *desc, X86Se
wvmcs(cpu->accel->fd, sf->ar_bytes, desc->ar);
}
-void x86_segment_descriptor_to_vmx(CPUState *cpu, x68_segment_selector selector,
+void x86_segment_descriptor_to_vmx(CPUState *cpu, x86_segment_selector selector,
struct x86_segment_descriptor *desc,
struct vmx_segment *vmx_desc)
{
diff --git a/target/i386/hvf/x86_descr.h b/target/i386/hvf/x86_descr.h
index 9f06014b56..ce5de98349 100644
--- a/target/i386/hvf/x86_descr.h
+++ b/target/i386/hvf/x86_descr.h
@@ -34,10 +34,10 @@ void vmx_read_segment_descriptor(CPUState *cpu,
void vmx_write_segment_descriptor(CPUState *cpu, struct vmx_segment *desc,
enum X86Seg seg);
-x68_segment_selector vmx_read_segment_selector(CPUState *cpu,
+x86_segment_selector vmx_read_segment_selector(CPUState *cpu,
enum X86Seg seg);
void vmx_write_segment_selector(CPUState *cpu,
- x68_segment_selector selector,
+ x86_segment_selector selector,
enum X86Seg seg);
uint64_t vmx_read_segment_base(CPUState *cpu, enum X86Seg seg);
@@ -45,7 +45,7 @@ void vmx_write_segment_base(CPUState *cpu, enum X86Seg seg,
uint64_t base);
void x86_segment_descriptor_to_vmx(CPUState *cpu,
- x68_segment_selector selector,
+ x86_segment_selector selector,
struct x86_segment_descriptor *desc,
struct vmx_segment *vmx_desc);
diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c
index bcd844cff6..287fe11cf7 100644
--- a/target/i386/hvf/x86_task.c
+++ b/target/i386/hvf/x86_task.c
@@ -76,16 +76,16 @@ static void load_state_from_tss32(CPUState *cpu, struct x86_tss_segment32 *tss)
RSI(env) = tss->esi;
RDI(env) = tss->edi;
- vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->ldt}}, R_LDTR);
- vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->es}}, R_ES);
- vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->cs}}, R_CS);
- vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->ss}}, R_SS);
- vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->ds}}, R_DS);
- vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->fs}}, R_FS);
- vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->gs}}, R_GS);
+ vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->ldt}}, R_LDTR);
+ vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->es}}, R_ES);
+ vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->cs}}, R_CS);
+ vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->ss}}, R_SS);
+ vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->ds}}, R_DS);
+ vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->fs}}, R_FS);
+ vmx_write_segment_selector(cpu, (x86_segment_selector){{tss->gs}}, R_GS);
}
-static int task_switch_32(CPUState *cpu, x68_segment_selector tss_sel, x68_segment_selector old_tss_sel,
+static int task_switch_32(CPUState *cpu, x86_segment_selector tss_sel, x86_segment_selector old_tss_sel,
uint64_t old_tss_base, struct x86_segment_descriptor *new_desc)
{
struct x86_tss_segment32 tss_seg;
@@ -108,7 +108,7 @@ static int task_switch_32(CPUState *cpu, x68_segment_selector tss_sel, x68_segme
return 0;
}
-void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, int reason, bool gate_valid, uint8_t gate, uint64_t gate_type)
+void vmx_handle_task_switch(CPUState *cpu, x86_segment_selector tss_sel, int reason, bool gate_valid, uint8_t gate, uint64_t gate_type)
{
uint64_t rip = rreg(cpu->accel->fd, HV_X86_RIP);
if (!gate_valid || (gate_type != VMCS_INTR_T_HWEXCEPTION &&
@@ -122,7 +122,7 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, int rea
load_regs(cpu);
struct x86_segment_descriptor curr_tss_desc, next_tss_desc;
- x68_segment_selector old_tss_sel = vmx_read_segment_selector(cpu, R_TR);
+ x86_segment_selector old_tss_sel = vmx_read_segment_selector(cpu, R_TR);
uint64_t old_tss_base = vmx_read_segment_base(cpu, R_TR);
uint32_t desc_limit;
struct x86_call_gate task_gate_desc;
@@ -140,7 +140,7 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, int rea
x86_read_call_gate(cpu, &task_gate_desc, gate);
dpl = task_gate_desc.dpl;
- x68_segment_selector cs = vmx_read_segment_selector(cpu, R_CS);
+ x86_segment_selector cs = vmx_read_segment_selector(cpu, R_CS);
if (tss_sel.rpl > dpl || cs.rpl > dpl)
;//DPRINTF("emulate_gp");
}
diff --git a/target/i386/hvf/x86_task.h b/target/i386/hvf/x86_task.h
index 4eaa61a7de..b9afac6a47 100644
--- a/target/i386/hvf/x86_task.h
+++ b/target/i386/hvf/x86_task.h
@@ -15,6 +15,6 @@
#ifndef HVF_X86_TASK_H
#define HVF_X86_TASK_H
-void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel,
+void vmx_handle_task_switch(CPUState *cpu, x86_segment_selector tss_sel,
int reason, bool gate_valid, uint8_t gate, uint64_t gate_type);
#endif
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [RFC PATCH v1 01/19] target/i386/hvf: fix a typo in a type name
2025-02-21 8:36 ` [RFC PATCH v1 01/19] target/i386/hvf: fix a typo in a type name Wei Liu
@ 2025-02-21 14:47 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 26+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-21 14:47 UTC (permalink / raw)
To: Wei Liu, qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv
On 21/2/25 09:36, Wei Liu wrote:
> The prefix x68 is wrong. Change it to x86.
>
> Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
> ---
> target/i386/hvf/hvf.c | 2 +-
> target/i386/hvf/x86.c | 4 ++--
> target/i386/hvf/x86.h | 8 ++++----
> target/i386/hvf/x86_descr.c | 8 ++++----
> target/i386/hvf/x86_descr.h | 6 +++---
> target/i386/hvf/x86_task.c | 22 +++++++++++-----------
> target/i386/hvf/x86_task.h | 2 +-
> 7 files changed, 26 insertions(+), 26 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [RFC PATCH v1 02/19] target/i386/hvf: fix the declaration of hvf_handle_io
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 01/19] target/i386/hvf: fix a typo in a type name Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 03/19] target/i386/hvf: use x86_segment in x86_decode.c Wei Liu
` (19 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
There is a conflicting declaration for hvf_handle_io in x86_emu.c. The type of
the first argument is wrong. There has never been a problem because the first
argument is not used in hvf_handle_io.
That being said, the code shouldn't contain such an error. Use the proper
declaration from hvf-i386.h.
Take the chance to change the first argument's type to be CPUState.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf-i386.h | 2 +-
target/i386/hvf/hvf.c | 6 +++---
target/i386/hvf/x86_emu.c | 4 +---
3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h
index e99c02cd4b..046b681d13 100644
--- a/target/i386/hvf/hvf-i386.h
+++ b/target/i386/hvf/hvf-i386.h
@@ -18,7 +18,7 @@
uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg);
-void hvf_handle_io(CPUArchState *, uint16_t, void *, int, int, int);
+void hvf_handle_io(CPUState *, uint16_t, void *, int, int, int);
/* Host specific functions */
int hvf_inject_interrupt(CPUArchState *env, int vector);
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 353549fa77..1ecb6993ba 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -103,7 +103,7 @@ static void update_apic_tpr(CPUState *cpu)
#define VECTORING_INFO_VECTOR_MASK 0xff
-void hvf_handle_io(CPUArchState *env, uint16_t port, void *buffer,
+void hvf_handle_io(CPUState *env, uint16_t port, void *buffer,
int direction, int size, int count)
{
int i;
@@ -536,7 +536,7 @@ int hvf_vcpu_exec(CPUState *cpu)
if (!string && in) {
uint64_t val = 0;
load_regs(cpu);
- hvf_handle_io(env, port, &val, 0, size, 1);
+ hvf_handle_io(env_cpu(env), port, &val, 0, size, 1);
if (size == 1) {
AL(env) = val;
} else if (size == 2) {
@@ -551,7 +551,7 @@ int hvf_vcpu_exec(CPUState *cpu)
break;
} else if (!string && !in) {
RAX(env) = rreg(cpu->accel->fd, HV_X86_RAX);
- hvf_handle_io(env, port, &RAX(env), 1, size, 1);
+ hvf_handle_io(env_cpu(env), port, &RAX(env), 1, size, 1);
macvm_set_rip(cpu, rip + ins_len);
break;
}
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index 69c61c9c07..2c7da10c1d 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -44,9 +44,7 @@
#include "x86_flags.h"
#include "vmcs.h"
#include "vmx.h"
-
-void hvf_handle_io(CPUState *cs, uint16_t port, void *data,
- int direction, int size, uint32_t count);
+#include "hvf-i386.h"
#define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \
{ \
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 03/19] target/i386/hvf: use x86_segment in x86_decode.c
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 01/19] target/i386/hvf: fix a typo in a type name Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 02/19] target/i386/hvf: fix the declaration of hvf_handle_io Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 04/19] target/i386/hvf: introduce x86_emul_ops Wei Liu
` (18 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Make the code to rely on the segment definition for checking cs.db.
This allows removing HVF specific VMX related definition from the
decoder.
Introduce a function for retrieving the CS descriptor.
No functional change intended.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/x86_decode.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/target/i386/hvf/x86_decode.c b/target/i386/hvf/x86_decode.c
index a4a28f113f..d6d5894e54 100644
--- a/target/i386/hvf/x86_decode.c
+++ b/target/i386/hvf/x86_decode.c
@@ -1893,6 +1893,16 @@ static void decode_prefix(CPUX86State *env, struct x86_decode *decode)
}
}
+static struct x86_segment_descriptor get_cs_descriptor(CPUState *s)
+{
+ struct vmx_segment vmx_cs;
+ x86_segment_descriptor cs;
+ vmx_read_segment_descriptor(s, &vmx_cs, R_CS);
+ vmx_segment_to_x86_descriptor(s, &vmx_cs, &cs);
+
+ return cs;
+}
+
void set_addressing_size(CPUX86State *env, struct x86_decode *decode)
{
decode->addressing_size = -1;
@@ -1904,10 +1914,9 @@ void set_addressing_size(CPUX86State *env, struct x86_decode *decode)
}
} else if (!x86_is_long_mode(env_cpu(env))) {
/* protected */
- struct vmx_segment cs;
- vmx_read_segment_descriptor(env_cpu(env), &cs, R_CS);
+ x86_segment_descriptor cs = get_cs_descriptor(env_cpu(env));
/* check db */
- if ((cs.ar >> 14) & 1) {
+ if (cs.db) {
if (decode->addr_size_override) {
decode->addressing_size = 2;
} else {
@@ -1941,10 +1950,9 @@ void set_operand_size(CPUX86State *env, struct x86_decode *decode)
}
} else if (!x86_is_long_mode(env_cpu(env))) {
/* protected */
- struct vmx_segment cs;
- vmx_read_segment_descriptor(env_cpu(env), &cs, R_CS);
+ x86_segment_descriptor cs = get_cs_descriptor(env_cpu(env));
/* check db */
- if ((cs.ar >> 14) & 1) {
+ if (cs.db) {
if (decode->op_size_override) {
decode->operand_size = 2;
} else{
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 04/19] target/i386/hvf: introduce x86_emul_ops
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (2 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 03/19] target/i386/hvf: use x86_segment in x86_decode.c Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 05/19] target/i386/hvf: remove HVF specific calls from x86_decode.c Wei Liu
` (17 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
This will be used to remove HVF specific code from the instruction emulator.
For now we only introduce two hooks for x86_decode.c. More hooks will be added
when the code is refactored.
The emulator initialization function now takes in a pointer to the ops structure.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf.c | 20 +++++++++++++++++++-
target/i386/hvf/x86_emu.c | 5 ++++-
target/i386/hvf/x86_emu.h | 10 +++++++++-
3 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 1ecb6993ba..e1e7cc3b7d 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -228,6 +228,24 @@ hv_return_t hvf_arch_vm_create(MachineState *ms, uint32_t pa_range)
return hv_vm_create(HV_VM_DEFAULT);
}
+static void hvf_read_segment_descriptor(CPUState *s, struct x86_segment_descriptor *desc,
+ X86Seg seg)
+{
+ struct vmx_segment vmx_segment;
+ vmx_read_segment_descriptor(s, &vmx_segment, seg);
+ vmx_segment_to_x86_descriptor(s, &vmx_segment, desc);
+}
+
+static void hvf_read_mem(CPUState *cpu, void *data, target_ulong gva, int bytes)
+{
+ vmx_read_mem(cpu, data, gva, bytes);
+}
+
+static const struct x86_emul_ops hvf_x86_emul_ops = {
+ .read_mem = hvf_read_mem,
+ .read_segment_descriptor = hvf_read_segment_descriptor,
+};
+
int hvf_arch_init_vcpu(CPUState *cpu)
{
X86CPU *x86cpu = X86_CPU(cpu);
@@ -236,7 +254,7 @@ int hvf_arch_init_vcpu(CPUState *cpu)
int r;
uint64_t reqCap;
- init_emu();
+ init_emu(&hvf_x86_emul_ops);
init_decoder();
if (hvf_state->hvf_caps == NULL) {
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index 2c7da10c1d..96447ea2c0 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -1444,6 +1444,8 @@ static struct cmd_handler {
static struct cmd_handler _cmd_handler[X86_DECODE_CMD_LAST];
+const struct x86_emul_ops *emul_ops;
+
static void init_cmd_handler(void)
{
int i;
@@ -1516,7 +1518,8 @@ bool exec_instruction(CPUX86State *env, struct x86_decode *ins)
return true;
}
-void init_emu(void)
+void init_emu(const struct x86_emul_ops *o)
{
+ emul_ops = o;
init_cmd_handler();
}
diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h
index 8bd97608c4..8f4f8f1eca 100644
--- a/target/i386/hvf/x86_emu.h
+++ b/target/i386/hvf/x86_emu.h
@@ -23,7 +23,15 @@
#include "x86_decode.h"
#include "cpu.h"
-void init_emu(void);
+struct x86_emul_ops {
+ void (*read_mem)(CPUState *cpu, void *data, target_ulong addr, int bytes);
+ void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_descriptor *desc,
+ enum X86Seg seg);
+};
+
+extern const struct x86_emul_ops *emul_ops;
+
+void init_emu(const struct x86_emul_ops *ops);
bool exec_instruction(CPUX86State *env, struct x86_decode *ins);
void load_regs(CPUState *cpu);
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 05/19] target/i386/hvf: remove HVF specific calls from x86_decode.c
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (3 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 04/19] target/i386/hvf: introduce x86_emul_ops Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 06/19] target/i386/hvf: move and rename {load, store}_regs Wei Liu
` (16 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Use the newly defined emul_ops. This allows the module to be reused
by other accelerator in the future.
No functional change intended.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/x86_decode.c | 19 ++++++-------------
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/target/i386/hvf/x86_decode.c b/target/i386/hvf/x86_decode.c
index d6d5894e54..31285952ad 100644
--- a/target/i386/hvf/x86_decode.c
+++ b/target/i386/hvf/x86_decode.c
@@ -21,6 +21,7 @@
#include "panic.h"
#include "x86_decode.h"
#include "vmx.h"
+#include "x86_emu.h"
#include "x86_mmu.h"
#include "x86_descr.h"
@@ -74,7 +75,7 @@ static inline uint64_t decode_bytes(CPUX86State *env, struct x86_decode *decode,
break;
}
target_ulong va = linear_rip(env_cpu(env), env->eip) + decode->len;
- vmx_read_mem(env_cpu(env), &val, va, size);
+ emul_ops->read_mem(env_cpu(env), &val, va, size);
decode->len += size;
return val;
@@ -1893,16 +1894,6 @@ static void decode_prefix(CPUX86State *env, struct x86_decode *decode)
}
}
-static struct x86_segment_descriptor get_cs_descriptor(CPUState *s)
-{
- struct vmx_segment vmx_cs;
- x86_segment_descriptor cs;
- vmx_read_segment_descriptor(s, &vmx_cs, R_CS);
- vmx_segment_to_x86_descriptor(s, &vmx_cs, &cs);
-
- return cs;
-}
-
void set_addressing_size(CPUX86State *env, struct x86_decode *decode)
{
decode->addressing_size = -1;
@@ -1914,7 +1905,8 @@ void set_addressing_size(CPUX86State *env, struct x86_decode *decode)
}
} else if (!x86_is_long_mode(env_cpu(env))) {
/* protected */
- x86_segment_descriptor cs = get_cs_descriptor(env_cpu(env));
+ x86_segment_descriptor cs;
+ emul_ops->read_segment_descriptor(env_cpu(env), &cs, R_CS);
/* check db */
if (cs.db) {
if (decode->addr_size_override) {
@@ -1950,7 +1942,8 @@ void set_operand_size(CPUX86State *env, struct x86_decode *decode)
}
} else if (!x86_is_long_mode(env_cpu(env))) {
/* protected */
- x86_segment_descriptor cs = get_cs_descriptor(env_cpu(env));
+ x86_segment_descriptor cs;
+ emul_ops->read_segment_descriptor(env_cpu(env), &cs, R_CS);
/* check db */
if (cs.db) {
if (decode->op_size_override) {
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 06/19] target/i386/hvf: move and rename {load, store}_regs
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (4 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 05/19] target/i386/hvf: remove HVF specific calls from x86_decode.c Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 07/19] target/i386/hvf: provide and use handle_io in emul_ops Wei Liu
` (15 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
They contain HVF specific code. Move them to a better location and
add "hvf_" prefix. Fix up all the call sites.
No functional change.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf.c | 71 +++++++++++++++++++++++++++++++-------
target/i386/hvf/x86_emu.c | 46 ------------------------
target/i386/hvf/x86_emu.h | 3 --
target/i386/hvf/x86_task.c | 4 +--
target/i386/hvf/x86hvf.h | 3 ++
5 files changed, 64 insertions(+), 63 deletions(-)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index e1e7cc3b7d..3c306101f9 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -61,6 +61,7 @@
#include "vmx.h"
#include "x86.h"
#include "x86_descr.h"
+#include "x86_flags.h"
#include "x86_mmu.h"
#include "x86_decode.h"
#include "x86_emu.h"
@@ -452,6 +453,52 @@ static void hvf_cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
}
}
+void hvf_load_regs(CPUState *cs)
+{
+ X86CPU *cpu = X86_CPU(cs);
+ CPUX86State *env = &cpu->env;
+
+ int i = 0;
+ RRX(env, R_EAX) = rreg(cs->accel->fd, HV_X86_RAX);
+ RRX(env, R_EBX) = rreg(cs->accel->fd, HV_X86_RBX);
+ RRX(env, R_ECX) = rreg(cs->accel->fd, HV_X86_RCX);
+ RRX(env, R_EDX) = rreg(cs->accel->fd, HV_X86_RDX);
+ RRX(env, R_ESI) = rreg(cs->accel->fd, HV_X86_RSI);
+ RRX(env, R_EDI) = rreg(cs->accel->fd, HV_X86_RDI);
+ RRX(env, R_ESP) = rreg(cs->accel->fd, HV_X86_RSP);
+ RRX(env, R_EBP) = rreg(cs->accel->fd, HV_X86_RBP);
+ for (i = 8; i < 16; i++) {
+ RRX(env, i) = rreg(cs->accel->fd, HV_X86_RAX + i);
+ }
+
+ env->eflags = rreg(cs->accel->fd, HV_X86_RFLAGS);
+ rflags_to_lflags(env);
+ env->eip = rreg(cs->accel->fd, HV_X86_RIP);
+}
+
+void hvf_store_regs(CPUState *cs)
+{
+ X86CPU *cpu = X86_CPU(cs);
+ CPUX86State *env = &cpu->env;
+
+ int i = 0;
+ wreg(cs->accel->fd, HV_X86_RAX, RAX(env));
+ wreg(cs->accel->fd, HV_X86_RBX, RBX(env));
+ wreg(cs->accel->fd, HV_X86_RCX, RCX(env));
+ wreg(cs->accel->fd, HV_X86_RDX, RDX(env));
+ wreg(cs->accel->fd, HV_X86_RSI, RSI(env));
+ wreg(cs->accel->fd, HV_X86_RDI, RDI(env));
+ wreg(cs->accel->fd, HV_X86_RBP, RBP(env));
+ wreg(cs->accel->fd, HV_X86_RSP, RSP(env));
+ for (i = 8; i < 16; i++) {
+ wreg(cs->accel->fd, HV_X86_RAX + i, RRX(env, i));
+ }
+
+ lflags_to_rflags(env);
+ wreg(cs->accel->fd, HV_X86_RFLAGS, env->eflags);
+ macvm_set_rip(cs, env->eip);
+}
+
int hvf_vcpu_exec(CPUState *cpu)
{
X86CPU *x86_cpu = X86_CPU(cpu);
@@ -535,10 +582,10 @@ int hvf_vcpu_exec(CPUState *cpu)
if (ept_emulation_fault(slot, gpa, exit_qual)) {
struct x86_decode decode;
- load_regs(cpu);
+ hvf_load_regs(cpu);
decode_instruction(env, &decode);
exec_instruction(env, &decode);
- store_regs(cpu);
+ hvf_store_regs(cpu);
break;
}
break;
@@ -553,7 +600,7 @@ int hvf_vcpu_exec(CPUState *cpu)
if (!string && in) {
uint64_t val = 0;
- load_regs(cpu);
+ hvf_load_regs(cpu);
hvf_handle_io(env_cpu(env), port, &val, 0, size, 1);
if (size == 1) {
AL(env) = val;
@@ -565,7 +612,7 @@ int hvf_vcpu_exec(CPUState *cpu)
RAX(env) = (uint64_t)val;
}
env->eip += ins_len;
- store_regs(cpu);
+ hvf_store_regs(cpu);
break;
} else if (!string && !in) {
RAX(env) = rreg(cpu->accel->fd, HV_X86_RAX);
@@ -575,11 +622,11 @@ int hvf_vcpu_exec(CPUState *cpu)
}
struct x86_decode decode;
- load_regs(cpu);
+ hvf_load_regs(cpu);
decode_instruction(env, &decode);
assert(ins_len == decode.len);
exec_instruction(env, &decode);
- store_regs(cpu);
+ hvf_store_regs(cpu);
break;
}
@@ -632,21 +679,21 @@ int hvf_vcpu_exec(CPUState *cpu)
case EXIT_REASON_RDMSR:
case EXIT_REASON_WRMSR:
{
- load_regs(cpu);
+ hvf_load_regs(cpu);
if (exit_reason == EXIT_REASON_RDMSR) {
simulate_rdmsr(env);
} else {
simulate_wrmsr(env);
}
env->eip += ins_len;
- store_regs(cpu);
+ hvf_store_regs(cpu);
break;
}
case EXIT_REASON_CR_ACCESS: {
int cr;
int reg;
- load_regs(cpu);
+ hvf_load_regs(cpu);
cr = exit_qual & 15;
reg = (exit_qual >> 8) & 15;
@@ -674,16 +721,16 @@ int hvf_vcpu_exec(CPUState *cpu)
abort();
}
env->eip += ins_len;
- store_regs(cpu);
+ hvf_store_regs(cpu);
break;
}
case EXIT_REASON_APIC_ACCESS: { /* TODO */
struct x86_decode decode;
- load_regs(cpu);
+ hvf_load_regs(cpu);
decode_instruction(env, &decode);
exec_instruction(env, &decode);
- store_regs(cpu);
+ hvf_store_regs(cpu);
break;
}
case EXIT_REASON_TPR: {
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index 96447ea2c0..2fb54e1f1e 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -1454,52 +1454,6 @@ static void init_cmd_handler(void)
}
}
-void load_regs(CPUState *cs)
-{
- X86CPU *cpu = X86_CPU(cs);
- CPUX86State *env = &cpu->env;
-
- int i = 0;
- RRX(env, R_EAX) = rreg(cs->accel->fd, HV_X86_RAX);
- RRX(env, R_EBX) = rreg(cs->accel->fd, HV_X86_RBX);
- RRX(env, R_ECX) = rreg(cs->accel->fd, HV_X86_RCX);
- RRX(env, R_EDX) = rreg(cs->accel->fd, HV_X86_RDX);
- RRX(env, R_ESI) = rreg(cs->accel->fd, HV_X86_RSI);
- RRX(env, R_EDI) = rreg(cs->accel->fd, HV_X86_RDI);
- RRX(env, R_ESP) = rreg(cs->accel->fd, HV_X86_RSP);
- RRX(env, R_EBP) = rreg(cs->accel->fd, HV_X86_RBP);
- for (i = 8; i < 16; i++) {
- RRX(env, i) = rreg(cs->accel->fd, HV_X86_RAX + i);
- }
-
- env->eflags = rreg(cs->accel->fd, HV_X86_RFLAGS);
- rflags_to_lflags(env);
- env->eip = rreg(cs->accel->fd, HV_X86_RIP);
-}
-
-void store_regs(CPUState *cs)
-{
- X86CPU *cpu = X86_CPU(cs);
- CPUX86State *env = &cpu->env;
-
- int i = 0;
- wreg(cs->accel->fd, HV_X86_RAX, RAX(env));
- wreg(cs->accel->fd, HV_X86_RBX, RBX(env));
- wreg(cs->accel->fd, HV_X86_RCX, RCX(env));
- wreg(cs->accel->fd, HV_X86_RDX, RDX(env));
- wreg(cs->accel->fd, HV_X86_RSI, RSI(env));
- wreg(cs->accel->fd, HV_X86_RDI, RDI(env));
- wreg(cs->accel->fd, HV_X86_RBP, RBP(env));
- wreg(cs->accel->fd, HV_X86_RSP, RSP(env));
- for (i = 8; i < 16; i++) {
- wreg(cs->accel->fd, HV_X86_RAX + i, RRX(env, i));
- }
-
- lflags_to_rflags(env);
- wreg(cs->accel->fd, HV_X86_RFLAGS, env->eflags);
- macvm_set_rip(cs, env->eip);
-}
-
bool exec_instruction(CPUX86State *env, struct x86_decode *ins)
{
/*if (hvf_vcpu_id(cs))
diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h
index 8f4f8f1eca..ebad7df1cc 100644
--- a/target/i386/hvf/x86_emu.h
+++ b/target/i386/hvf/x86_emu.h
@@ -34,9 +34,6 @@ extern const struct x86_emul_ops *emul_ops;
void init_emu(const struct x86_emul_ops *ops);
bool exec_instruction(CPUX86State *env, struct x86_decode *ins);
-void load_regs(CPUState *cpu);
-void store_regs(CPUState *cpu);
-
void simulate_rdmsr(CPUX86State *env);
void simulate_wrmsr(CPUX86State *env);
diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c
index 287fe11cf7..161217991f 100644
--- a/target/i386/hvf/x86_task.c
+++ b/target/i386/hvf/x86_task.c
@@ -119,7 +119,7 @@ void vmx_handle_task_switch(CPUState *cpu, x86_segment_selector tss_sel, int rea
return;
}
- load_regs(cpu);
+ hvf_load_regs(cpu);
struct x86_segment_descriptor curr_tss_desc, next_tss_desc;
x86_segment_selector old_tss_sel = vmx_read_segment_selector(cpu, R_TR);
@@ -178,7 +178,7 @@ void vmx_handle_task_switch(CPUState *cpu, x86_segment_selector tss_sel, int rea
x86_segment_descriptor_to_vmx(cpu, tss_sel, &next_tss_desc, &vmx_seg);
vmx_write_segment_descriptor(cpu, &vmx_seg, R_TR);
- store_regs(cpu);
+ hvf_store_regs(cpu);
hv_vcpu_invalidate_tlb(cpu->accel->fd);
}
diff --git a/target/i386/hvf/x86hvf.h b/target/i386/hvf/x86hvf.h
index 423a89b6ad..8c46ce8ad0 100644
--- a/target/i386/hvf/x86hvf.h
+++ b/target/i386/hvf/x86hvf.h
@@ -31,4 +31,7 @@ void hvf_get_xsave(CPUState *cs);
void hvf_get_msrs(CPUState *cs);
void vmx_clear_int_window_exiting(CPUState *cs);
void vmx_update_tpr(CPUState *cs);
+
+void hvf_load_regs(CPUState *cpu);
+void hvf_store_regs(CPUState *cpu);
#endif
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 07/19] target/i386/hvf: provide and use handle_io in emul_ops
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (5 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 06/19] target/i386/hvf: move and rename {load, store}_regs Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 08/19] target/i386: rename hvf_mmio_buf to mmio_buf Wei Liu
` (14 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
This drops the calls to hvf_handle_io from x86_emu.c.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf.c | 1 +
target/i386/hvf/x86_emu.c | 30 +++++++++++++++---------------
target/i386/hvf/x86_emu.h | 2 ++
3 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 3c306101f9..64e4154cdf 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -245,6 +245,7 @@ static void hvf_read_mem(CPUState *cpu, void *data, target_ulong gva, int bytes)
static const struct x86_emul_ops hvf_x86_emul_ops = {
.read_mem = hvf_read_mem,
.read_segment_descriptor = hvf_read_segment_descriptor,
+ .handle_io = hvf_handle_io,
};
int hvf_arch_init_vcpu(CPUState *cpu)
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index 2fb54e1f1e..25912e82ca 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -44,7 +44,6 @@
#include "x86_flags.h"
#include "vmcs.h"
#include "vmx.h"
-#include "hvf-i386.h"
#define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \
{ \
@@ -396,18 +395,18 @@ static void exec_out(CPUX86State *env, struct x86_decode *decode)
{
switch (decode->opcode[0]) {
case 0xe6:
- hvf_handle_io(env_cpu(env), decode->op[0].val, &AL(env), 1, 1, 1);
+ emul_ops->handle_io(env_cpu(env), decode->op[0].val, &AL(env), 1, 1, 1);
break;
case 0xe7:
- hvf_handle_io(env_cpu(env), decode->op[0].val, &RAX(env), 1,
- decode->operand_size, 1);
+ emul_ops->handle_io(env_cpu(env), decode->op[0].val, &RAX(env), 1,
+ decode->operand_size, 1);
break;
case 0xee:
- hvf_handle_io(env_cpu(env), DX(env), &AL(env), 1, 1, 1);
+ emul_ops->handle_io(env_cpu(env), DX(env), &AL(env), 1, 1, 1);
break;
case 0xef:
- hvf_handle_io(env_cpu(env), DX(env), &RAX(env), 1,
- decode->operand_size, 1);
+ emul_ops->handle_io(env_cpu(env), DX(env), &RAX(env), 1,
+ decode->operand_size, 1);
break;
default:
VM_PANIC("Bad out opcode\n");
@@ -421,10 +420,10 @@ static void exec_in(CPUX86State *env, struct x86_decode *decode)
target_ulong val = 0;
switch (decode->opcode[0]) {
case 0xe4:
- hvf_handle_io(env_cpu(env), decode->op[0].val, &AL(env), 0, 1, 1);
+ emul_ops->handle_io(env_cpu(env), decode->op[0].val, &AL(env), 0, 1, 1);
break;
case 0xe5:
- hvf_handle_io(env_cpu(env), decode->op[0].val, &val, 0,
+ emul_ops->handle_io(env_cpu(env), decode->op[0].val, &val, 0,
decode->operand_size, 1);
if (decode->operand_size == 2) {
AX(env) = val;
@@ -433,10 +432,11 @@ static void exec_in(CPUX86State *env, struct x86_decode *decode)
}
break;
case 0xec:
- hvf_handle_io(env_cpu(env), DX(env), &AL(env), 0, 1, 1);
+ emul_ops->handle_io(env_cpu(env), DX(env), &AL(env), 0, 1, 1);
break;
case 0xed:
- hvf_handle_io(env_cpu(env), DX(env), &val, 0, decode->operand_size, 1);
+ emul_ops->handle_io(env_cpu(env), DX(env), &val, 0,
+ decode->operand_size, 1);
if (decode->operand_size == 2) {
AX(env) = val;
} else {
@@ -486,8 +486,8 @@ static void exec_ins_single(CPUX86State *env, struct x86_decode *decode)
target_ulong addr = linear_addr_size(env_cpu(env), RDI(env),
decode->addressing_size, R_ES);
- hvf_handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 0,
- decode->operand_size, 1);
+ emul_ops->handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 0,
+ decode->operand_size, 1);
vmx_write_mem(env_cpu(env), addr, env->hvf_mmio_buf,
decode->operand_size);
@@ -511,8 +511,8 @@ static void exec_outs_single(CPUX86State *env, struct x86_decode *decode)
vmx_read_mem(env_cpu(env), env->hvf_mmio_buf, addr,
decode->operand_size);
- hvf_handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 1,
- decode->operand_size, 1);
+ emul_ops->handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 1,
+ decode->operand_size, 1);
string_increment_reg(env, R_ESI, decode);
}
diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h
index ebad7df1cc..3bca541bae 100644
--- a/target/i386/hvf/x86_emu.h
+++ b/target/i386/hvf/x86_emu.h
@@ -27,6 +27,8 @@ struct x86_emul_ops {
void (*read_mem)(CPUState *cpu, void *data, target_ulong addr, int bytes);
void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_descriptor *desc,
enum X86Seg seg);
+ void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direction,
+ int size, int count);
};
extern const struct x86_emul_ops *emul_ops;
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 08/19] target/i386: rename hvf_mmio_buf to mmio_buf
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (6 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 07/19] target/i386/hvf: provide and use handle_io in emul_ops Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 09/19] target/i386/hvf: use emul_ops->read_mem in x86_emu.c Wei Liu
` (13 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
We want to refactor HVF's instruction emulator to a common component. Renaming
hvf_mmio_buf removes the association between HVF and the instruction emulator.
The definition of the field is still guarded by CONFIG_HVF for now, since it is
the only user.
No functional change.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/cpu.h | 2 +-
target/i386/hvf/hvf.c | 4 ++--
target/i386/hvf/x86_emu.c | 12 ++++++------
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index c67b42d34f..bfdb1f87a3 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2070,7 +2070,7 @@ typedef struct CPUArchState {
#endif
#if defined(CONFIG_HVF)
HVFX86LazyFlags hvf_lflags;
- void *hvf_mmio_buf;
+ void *mmio_buf;
#endif
uint64_t mcg_cap;
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 64e4154cdf..533b05577d 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -168,7 +168,7 @@ void hvf_arch_vcpu_destroy(CPUState *cpu)
X86CPU *x86_cpu = X86_CPU(cpu);
CPUX86State *env = &x86_cpu->env;
- g_free(env->hvf_mmio_buf);
+ g_free(env->mmio_buf);
}
static void init_tsc_freq(CPUX86State *env)
@@ -262,7 +262,7 @@ int hvf_arch_init_vcpu(CPUState *cpu)
if (hvf_state->hvf_caps == NULL) {
hvf_state->hvf_caps = g_new0(struct hvf_vcpu_caps, 1);
}
- env->hvf_mmio_buf = g_new(char, 4096);
+ env->mmio_buf = g_new(char, 4096);
if (x86cpu->vmware_cpuid_freq) {
init_tsc_freq(env);
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index 25912e82ca..d0a8e221ea 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -183,8 +183,8 @@ void write_val_ext(CPUX86State *env, target_ulong ptr, target_ulong val, int siz
uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes)
{
- vmx_read_mem(env_cpu(env), env->hvf_mmio_buf, ptr, bytes);
- return env->hvf_mmio_buf;
+ vmx_read_mem(env_cpu(env), env->mmio_buf, ptr, bytes);
+ return env->mmio_buf;
}
@@ -486,9 +486,9 @@ static void exec_ins_single(CPUX86State *env, struct x86_decode *decode)
target_ulong addr = linear_addr_size(env_cpu(env), RDI(env),
decode->addressing_size, R_ES);
- emul_ops->handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 0,
+ emul_ops->handle_io(env_cpu(env), DX(env), env->mmio_buf, 0,
decode->operand_size, 1);
- vmx_write_mem(env_cpu(env), addr, env->hvf_mmio_buf,
+ vmx_write_mem(env_cpu(env), addr, env->mmio_buf,
decode->operand_size);
string_increment_reg(env, R_EDI, decode);
@@ -509,9 +509,9 @@ static void exec_outs_single(CPUX86State *env, struct x86_decode *decode)
{
target_ulong addr = decode_linear_addr(env, decode, RSI(env), R_DS);
- vmx_read_mem(env_cpu(env), env->hvf_mmio_buf, addr,
+ vmx_read_mem(env_cpu(env), env->mmio_buf, addr,
decode->operand_size);
- emul_ops->handle_io(env_cpu(env), DX(env), env->hvf_mmio_buf, 1,
+ emul_ops->handle_io(env_cpu(env), DX(env), env->mmio_buf, 1,
decode->operand_size, 1);
string_increment_reg(env, R_ESI, decode);
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 09/19] target/i386/hvf: use emul_ops->read_mem in x86_emu.c
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (7 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 08/19] target/i386: rename hvf_mmio_buf to mmio_buf Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 10/19] taret/i386/hvf: provide and use write_mem in emul_ops Wei Liu
` (12 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
No functional change.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/x86_emu.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index d0a8e221ea..f1244640e6 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -183,7 +183,7 @@ void write_val_ext(CPUX86State *env, target_ulong ptr, target_ulong val, int siz
uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes)
{
- vmx_read_mem(env_cpu(env), env->mmio_buf, ptr, bytes);
+ emul_ops->read_mem(env_cpu(env), env->mmio_buf, ptr, bytes);
return env->mmio_buf;
}
@@ -509,8 +509,8 @@ static void exec_outs_single(CPUX86State *env, struct x86_decode *decode)
{
target_ulong addr = decode_linear_addr(env, decode, RSI(env), R_DS);
- vmx_read_mem(env_cpu(env), env->mmio_buf, addr,
- decode->operand_size);
+ emul_ops->read_mem(env_cpu(env), env->mmio_buf, addr,
+ decode->operand_size);
emul_ops->handle_io(env_cpu(env), DX(env), env->mmio_buf, 1,
decode->operand_size, 1);
@@ -619,7 +619,7 @@ static void exec_scas_single(CPUX86State *env, struct x86_decode *decode)
addr = linear_addr_size(env_cpu(env), RDI(env),
decode->addressing_size, R_ES);
decode->op[1].type = X86_VAR_IMMEDIATE;
- vmx_read_mem(env_cpu(env), &decode->op[1].val, addr, decode->operand_size);
+ emul_ops->read_mem(env_cpu(env), &decode->op[1].val, addr, decode->operand_size);
EXEC_2OP_FLAGS_CMD(env, decode, -, SET_FLAGS_OSZAPC_SUB, false);
string_increment_reg(env, R_EDI, decode);
@@ -644,7 +644,7 @@ static void exec_lods_single(CPUX86State *env, struct x86_decode *decode)
target_ulong val = 0;
addr = decode_linear_addr(env, decode, RSI(env), R_DS);
- vmx_read_mem(env_cpu(env), &val, addr, decode->operand_size);
+ emul_ops->read_mem(env_cpu(env), &val, addr, decode->operand_size);
write_reg(env, R_EAX, val, decode->operand_size);
string_increment_reg(env, R_ESI, decode);
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 10/19] taret/i386/hvf: provide and use write_mem in emul_ops
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (8 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 09/19] target/i386/hvf: use emul_ops->read_mem in x86_emu.c Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 11/19] target/i386/hvf: move and rename simulate_{rdmsr, wrmsr} Wei Liu
` (11 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf.c | 6 ++++++
target/i386/hvf/x86_emu.c | 8 ++++----
target/i386/hvf/x86_emu.h | 1 +
3 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 533b05577d..e108e2bbe6 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -242,8 +242,14 @@ static void hvf_read_mem(CPUState *cpu, void *data, target_ulong gva, int bytes)
vmx_read_mem(cpu, data, gva, bytes);
}
+static void hvf_write_mem(CPUState *cpu, void *data, target_ulong gva, int bytes)
+{
+ vmx_write_mem(cpu, gva, data, bytes);
+}
+
static const struct x86_emul_ops hvf_x86_emul_ops = {
.read_mem = hvf_read_mem,
+ .write_mem = hvf_write_mem,
.read_segment_descriptor = hvf_read_segment_descriptor,
.handle_io = hvf_handle_io,
};
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index f1244640e6..ef4b77b10e 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -178,7 +178,7 @@ void write_val_ext(CPUX86State *env, target_ulong ptr, target_ulong val, int siz
write_val_to_reg(ptr, val, size);
return;
}
- vmx_write_mem(env_cpu(env), ptr, &val, size);
+ emul_ops->write_mem(env_cpu(env), &val, ptr, size);
}
uint8_t *read_mmio(CPUX86State *env, target_ulong ptr, int bytes)
@@ -488,8 +488,8 @@ static void exec_ins_single(CPUX86State *env, struct x86_decode *decode)
emul_ops->handle_io(env_cpu(env), DX(env), env->mmio_buf, 0,
decode->operand_size, 1);
- vmx_write_mem(env_cpu(env), addr, env->mmio_buf,
- decode->operand_size);
+ emul_ops->write_mem(env_cpu(env), env->mmio_buf, addr,
+ decode->operand_size);
string_increment_reg(env, R_EDI, decode);
}
@@ -595,7 +595,7 @@ static void exec_stos_single(CPUX86State *env, struct x86_decode *decode)
addr = linear_addr_size(env_cpu(env), RDI(env),
decode->addressing_size, R_ES);
val = read_reg(env, R_EAX, decode->operand_size);
- vmx_write_mem(env_cpu(env), addr, &val, decode->operand_size);
+ emul_ops->write_mem(env_cpu(env), &val, addr, decode->operand_size);
string_increment_reg(env, R_EDI, decode);
}
diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h
index 3bca541bae..a1d1dc7d74 100644
--- a/target/i386/hvf/x86_emu.h
+++ b/target/i386/hvf/x86_emu.h
@@ -25,6 +25,7 @@
struct x86_emul_ops {
void (*read_mem)(CPUState *cpu, void *data, target_ulong addr, int bytes);
+ void (*write_mem)(CPUState *cpu, void *data, target_ulong addr, int bytes);
void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_descriptor *desc,
enum X86Seg seg);
void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direction,
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 11/19] target/i386/hvf: move and rename simulate_{rdmsr, wrmsr}
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (9 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 10/19] taret/i386/hvf: provide and use write_mem in emul_ops Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 12/19] target/i386/hvf: provide and use simulate_{wrmsr, rdmsr} in emul_ops Wei Liu
` (10 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
This requires making raise_exception non-static. That function needs to be
renamed to avoid clashing with a function in TCG.
Mostly code movement. No functional change.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf-i386.h | 2 +
target/i386/hvf/hvf.c | 216 +++++++++++++++++++++++++++++++++++-
target/i386/hvf/x86_emu.c | 220 +------------------------------------
target/i386/hvf/x86_emu.h | 4 +-
4 files changed, 221 insertions(+), 221 deletions(-)
diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h
index 046b681d13..044ad236ae 100644
--- a/target/i386/hvf/hvf-i386.h
+++ b/target/i386/hvf/hvf-i386.h
@@ -19,6 +19,8 @@
uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg);
void hvf_handle_io(CPUState *, uint16_t, void *, int, int, int);
+void hvf_simulate_rdmsr(CPUX86State *env);
+void hvf_simulate_wrmsr(CPUX86State *env);
/* Host specific functions */
int hvf_inject_interrupt(CPUArchState *env, int vector);
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index e108e2bbe6..88f5487b45 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -506,6 +506,218 @@ void hvf_store_regs(CPUState *cs)
macvm_set_rip(cs, env->eip);
}
+void hvf_simulate_rdmsr(CPUX86State *env)
+{
+ X86CPU *cpu = env_archcpu(env);
+ CPUState *cs = env_cpu(env);
+ uint32_t msr = ECX(env);
+ uint64_t val = 0;
+
+ switch (msr) {
+ case MSR_IA32_TSC:
+ val = rdtscp() + rvmcs(cs->accel->fd, VMCS_TSC_OFFSET);
+ break;
+ case MSR_IA32_APICBASE:
+ val = cpu_get_apic_base(cpu->apic_state);
+ break;
+ case MSR_APIC_START ... MSR_APIC_END: {
+ int ret;
+ int index = (uint32_t)env->regs[R_ECX] - MSR_APIC_START;
+
+ ret = apic_msr_read(index, &val);
+ if (ret < 0) {
+ x86_emul_raise_exception(env, EXCP0D_GPF, 0);
+ }
+
+ break;
+ }
+ case MSR_IA32_UCODE_REV:
+ val = cpu->ucode_rev;
+ break;
+ case MSR_EFER:
+ val = rvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER);
+ break;
+ case MSR_FSBASE:
+ val = rvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE);
+ break;
+ case MSR_GSBASE:
+ val = rvmcs(cs->accel->fd, VMCS_GUEST_GS_BASE);
+ break;
+ case MSR_KERNELGSBASE:
+ val = rvmcs(cs->accel->fd, VMCS_HOST_FS_BASE);
+ break;
+ case MSR_STAR:
+ abort();
+ break;
+ case MSR_LSTAR:
+ abort();
+ break;
+ case MSR_CSTAR:
+ abort();
+ break;
+ case MSR_IA32_MISC_ENABLE:
+ val = env->msr_ia32_misc_enable;
+ break;
+ case MSR_MTRRphysBase(0):
+ case MSR_MTRRphysBase(1):
+ case MSR_MTRRphysBase(2):
+ case MSR_MTRRphysBase(3):
+ case MSR_MTRRphysBase(4):
+ case MSR_MTRRphysBase(5):
+ case MSR_MTRRphysBase(6):
+ case MSR_MTRRphysBase(7):
+ val = env->mtrr_var[(ECX(env) - MSR_MTRRphysBase(0)) / 2].base;
+ break;
+ case MSR_MTRRphysMask(0):
+ case MSR_MTRRphysMask(1):
+ case MSR_MTRRphysMask(2):
+ case MSR_MTRRphysMask(3):
+ case MSR_MTRRphysMask(4):
+ case MSR_MTRRphysMask(5):
+ case MSR_MTRRphysMask(6):
+ case MSR_MTRRphysMask(7):
+ val = env->mtrr_var[(ECX(env) - MSR_MTRRphysMask(0)) / 2].mask;
+ break;
+ case MSR_MTRRfix64K_00000:
+ val = env->mtrr_fixed[0];
+ break;
+ case MSR_MTRRfix16K_80000:
+ case MSR_MTRRfix16K_A0000:
+ val = env->mtrr_fixed[ECX(env) - MSR_MTRRfix16K_80000 + 1];
+ break;
+ case MSR_MTRRfix4K_C0000:
+ case MSR_MTRRfix4K_C8000:
+ case MSR_MTRRfix4K_D0000:
+ case MSR_MTRRfix4K_D8000:
+ case MSR_MTRRfix4K_E0000:
+ case MSR_MTRRfix4K_E8000:
+ case MSR_MTRRfix4K_F0000:
+ case MSR_MTRRfix4K_F8000:
+ val = env->mtrr_fixed[ECX(env) - MSR_MTRRfix4K_C0000 + 3];
+ break;
+ case MSR_MTRRdefType:
+ val = env->mtrr_deftype;
+ break;
+ case MSR_CORE_THREAD_COUNT:
+ val = cpu_x86_get_msr_core_thread_count(cpu);
+ break;
+ default:
+ /* fprintf(stderr, "%s: unknown msr 0x%x\n", __func__, msr); */
+ val = 0;
+ break;
+ }
+
+ RAX(env) = (uint32_t)val;
+ RDX(env) = (uint32_t)(val >> 32);
+}
+
+void hvf_simulate_wrmsr(CPUX86State *env)
+{
+ X86CPU *cpu = env_archcpu(env);
+ CPUState *cs = env_cpu(env);
+ uint32_t msr = ECX(env);
+ uint64_t data = ((uint64_t)EDX(env) << 32) | EAX(env);
+
+ switch (msr) {
+ case MSR_IA32_TSC:
+ break;
+ case MSR_IA32_APICBASE: {
+ int r;
+
+ r = cpu_set_apic_base(cpu->apic_state, data);
+ if (r < 0) {
+ x86_emul_raise_exception(env, EXCP0D_GPF, 0);
+ }
+
+ break;
+ }
+ case MSR_APIC_START ... MSR_APIC_END: {
+ int ret;
+ int index = (uint32_t)env->regs[R_ECX] - MSR_APIC_START;
+
+ ret = apic_msr_write(index, data);
+ if (ret < 0) {
+ x86_emul_raise_exception(env, EXCP0D_GPF, 0);
+ }
+
+ break;
+ }
+ case MSR_FSBASE:
+ wvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE, data);
+ break;
+ case MSR_GSBASE:
+ wvmcs(cs->accel->fd, VMCS_GUEST_GS_BASE, data);
+ break;
+ case MSR_KERNELGSBASE:
+ wvmcs(cs->accel->fd, VMCS_HOST_FS_BASE, data);
+ break;
+ case MSR_STAR:
+ abort();
+ break;
+ case MSR_LSTAR:
+ abort();
+ break;
+ case MSR_CSTAR:
+ abort();
+ break;
+ case MSR_EFER:
+ /*printf("new efer %llx\n", EFER(cs));*/
+ wvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER, data);
+ if (data & MSR_EFER_NXE) {
+ hv_vcpu_invalidate_tlb(cs->accel->fd);
+ }
+ break;
+ case MSR_MTRRphysBase(0):
+ case MSR_MTRRphysBase(1):
+ case MSR_MTRRphysBase(2):
+ case MSR_MTRRphysBase(3):
+ case MSR_MTRRphysBase(4):
+ case MSR_MTRRphysBase(5):
+ case MSR_MTRRphysBase(6):
+ case MSR_MTRRphysBase(7):
+ env->mtrr_var[(ECX(env) - MSR_MTRRphysBase(0)) / 2].base = data;
+ break;
+ case MSR_MTRRphysMask(0):
+ case MSR_MTRRphysMask(1):
+ case MSR_MTRRphysMask(2):
+ case MSR_MTRRphysMask(3):
+ case MSR_MTRRphysMask(4):
+ case MSR_MTRRphysMask(5):
+ case MSR_MTRRphysMask(6):
+ case MSR_MTRRphysMask(7):
+ env->mtrr_var[(ECX(env) - MSR_MTRRphysMask(0)) / 2].mask = data;
+ break;
+ case MSR_MTRRfix64K_00000:
+ env->mtrr_fixed[ECX(env) - MSR_MTRRfix64K_00000] = data;
+ break;
+ case MSR_MTRRfix16K_80000:
+ case MSR_MTRRfix16K_A0000:
+ env->mtrr_fixed[ECX(env) - MSR_MTRRfix16K_80000 + 1] = data;
+ break;
+ case MSR_MTRRfix4K_C0000:
+ case MSR_MTRRfix4K_C8000:
+ case MSR_MTRRfix4K_D0000:
+ case MSR_MTRRfix4K_D8000:
+ case MSR_MTRRfix4K_E0000:
+ case MSR_MTRRfix4K_E8000:
+ case MSR_MTRRfix4K_F0000:
+ case MSR_MTRRfix4K_F8000:
+ env->mtrr_fixed[ECX(env) - MSR_MTRRfix4K_C0000 + 3] = data;
+ break;
+ case MSR_MTRRdefType:
+ env->mtrr_deftype = data;
+ break;
+ default:
+ break;
+ }
+
+ /* Related to support known hypervisor interface */
+ /* if (g_hypervisor_iface)
+ g_hypervisor_iface->wrmsr_handler(cs, msr, data);
+
+ printf("write msr %llx\n", RCX(cs));*/
+}
+
int hvf_vcpu_exec(CPUState *cpu)
{
X86CPU *x86_cpu = X86_CPU(cpu);
@@ -688,9 +900,9 @@ int hvf_vcpu_exec(CPUState *cpu)
{
hvf_load_regs(cpu);
if (exit_reason == EXIT_REASON_RDMSR) {
- simulate_rdmsr(env);
+ hvf_simulate_rdmsr(env);
} else {
- simulate_wrmsr(env);
+ hvf_simulate_wrmsr(env);
}
env->eip += ins_len;
hvf_store_regs(cpu);
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index ef4b77b10e..b6e63daea4 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -44,6 +44,7 @@
#include "x86_flags.h"
#include "vmcs.h"
#include "vmx.h"
+#include "hvf-i386.h"
#define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \
{ \
@@ -661,8 +662,7 @@ static void exec_lods(CPUX86State *env, struct x86_decode *decode)
env->eip += decode->len;
}
-static void raise_exception(CPUX86State *env, int exception_index,
- int error_code)
+void x86_emul_raise_exception(CPUX86State *env, int exception_index, int error_code)
{
env->exception_nr = exception_index;
env->error_code = error_code;
@@ -670,227 +670,15 @@ static void raise_exception(CPUX86State *env, int exception_index,
env->exception_injected = 1;
}
-void simulate_rdmsr(CPUX86State *env)
-{
- X86CPU *cpu = env_archcpu(env);
- CPUState *cs = env_cpu(env);
- uint32_t msr = ECX(env);
- uint64_t val = 0;
-
- switch (msr) {
- case MSR_IA32_TSC:
- val = rdtscp() + rvmcs(cs->accel->fd, VMCS_TSC_OFFSET);
- break;
- case MSR_IA32_APICBASE:
- val = cpu_get_apic_base(cpu->apic_state);
- break;
- case MSR_APIC_START ... MSR_APIC_END: {
- int ret;
- int index = (uint32_t)env->regs[R_ECX] - MSR_APIC_START;
-
- ret = apic_msr_read(index, &val);
- if (ret < 0) {
- raise_exception(env, EXCP0D_GPF, 0);
- }
-
- break;
- }
- case MSR_IA32_UCODE_REV:
- val = cpu->ucode_rev;
- break;
- case MSR_EFER:
- val = rvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER);
- break;
- case MSR_FSBASE:
- val = rvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE);
- break;
- case MSR_GSBASE:
- val = rvmcs(cs->accel->fd, VMCS_GUEST_GS_BASE);
- break;
- case MSR_KERNELGSBASE:
- val = rvmcs(cs->accel->fd, VMCS_HOST_FS_BASE);
- break;
- case MSR_STAR:
- abort();
- break;
- case MSR_LSTAR:
- abort();
- break;
- case MSR_CSTAR:
- abort();
- break;
- case MSR_IA32_MISC_ENABLE:
- val = env->msr_ia32_misc_enable;
- break;
- case MSR_MTRRphysBase(0):
- case MSR_MTRRphysBase(1):
- case MSR_MTRRphysBase(2):
- case MSR_MTRRphysBase(3):
- case MSR_MTRRphysBase(4):
- case MSR_MTRRphysBase(5):
- case MSR_MTRRphysBase(6):
- case MSR_MTRRphysBase(7):
- val = env->mtrr_var[(ECX(env) - MSR_MTRRphysBase(0)) / 2].base;
- break;
- case MSR_MTRRphysMask(0):
- case MSR_MTRRphysMask(1):
- case MSR_MTRRphysMask(2):
- case MSR_MTRRphysMask(3):
- case MSR_MTRRphysMask(4):
- case MSR_MTRRphysMask(5):
- case MSR_MTRRphysMask(6):
- case MSR_MTRRphysMask(7):
- val = env->mtrr_var[(ECX(env) - MSR_MTRRphysMask(0)) / 2].mask;
- break;
- case MSR_MTRRfix64K_00000:
- val = env->mtrr_fixed[0];
- break;
- case MSR_MTRRfix16K_80000:
- case MSR_MTRRfix16K_A0000:
- val = env->mtrr_fixed[ECX(env) - MSR_MTRRfix16K_80000 + 1];
- break;
- case MSR_MTRRfix4K_C0000:
- case MSR_MTRRfix4K_C8000:
- case MSR_MTRRfix4K_D0000:
- case MSR_MTRRfix4K_D8000:
- case MSR_MTRRfix4K_E0000:
- case MSR_MTRRfix4K_E8000:
- case MSR_MTRRfix4K_F0000:
- case MSR_MTRRfix4K_F8000:
- val = env->mtrr_fixed[ECX(env) - MSR_MTRRfix4K_C0000 + 3];
- break;
- case MSR_MTRRdefType:
- val = env->mtrr_deftype;
- break;
- case MSR_CORE_THREAD_COUNT:
- val = cpu_x86_get_msr_core_thread_count(cpu);
- break;
- default:
- /* fprintf(stderr, "%s: unknown msr 0x%x\n", __func__, msr); */
- val = 0;
- break;
- }
-
- RAX(env) = (uint32_t)val;
- RDX(env) = (uint32_t)(val >> 32);
-}
-
static void exec_rdmsr(CPUX86State *env, struct x86_decode *decode)
{
- simulate_rdmsr(env);
+ hvf_simulate_rdmsr(env);
env->eip += decode->len;
}
-void simulate_wrmsr(CPUX86State *env)
-{
- X86CPU *cpu = env_archcpu(env);
- CPUState *cs = env_cpu(env);
- uint32_t msr = ECX(env);
- uint64_t data = ((uint64_t)EDX(env) << 32) | EAX(env);
-
- switch (msr) {
- case MSR_IA32_TSC:
- break;
- case MSR_IA32_APICBASE: {
- int r;
-
- r = cpu_set_apic_base(cpu->apic_state, data);
- if (r < 0) {
- raise_exception(env, EXCP0D_GPF, 0);
- }
-
- break;
- }
- case MSR_APIC_START ... MSR_APIC_END: {
- int ret;
- int index = (uint32_t)env->regs[R_ECX] - MSR_APIC_START;
-
- ret = apic_msr_write(index, data);
- if (ret < 0) {
- raise_exception(env, EXCP0D_GPF, 0);
- }
-
- break;
- }
- case MSR_FSBASE:
- wvmcs(cs->accel->fd, VMCS_GUEST_FS_BASE, data);
- break;
- case MSR_GSBASE:
- wvmcs(cs->accel->fd, VMCS_GUEST_GS_BASE, data);
- break;
- case MSR_KERNELGSBASE:
- wvmcs(cs->accel->fd, VMCS_HOST_FS_BASE, data);
- break;
- case MSR_STAR:
- abort();
- break;
- case MSR_LSTAR:
- abort();
- break;
- case MSR_CSTAR:
- abort();
- break;
- case MSR_EFER:
- /*printf("new efer %llx\n", EFER(cs));*/
- wvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER, data);
- if (data & MSR_EFER_NXE) {
- hv_vcpu_invalidate_tlb(cs->accel->fd);
- }
- break;
- case MSR_MTRRphysBase(0):
- case MSR_MTRRphysBase(1):
- case MSR_MTRRphysBase(2):
- case MSR_MTRRphysBase(3):
- case MSR_MTRRphysBase(4):
- case MSR_MTRRphysBase(5):
- case MSR_MTRRphysBase(6):
- case MSR_MTRRphysBase(7):
- env->mtrr_var[(ECX(env) - MSR_MTRRphysBase(0)) / 2].base = data;
- break;
- case MSR_MTRRphysMask(0):
- case MSR_MTRRphysMask(1):
- case MSR_MTRRphysMask(2):
- case MSR_MTRRphysMask(3):
- case MSR_MTRRphysMask(4):
- case MSR_MTRRphysMask(5):
- case MSR_MTRRphysMask(6):
- case MSR_MTRRphysMask(7):
- env->mtrr_var[(ECX(env) - MSR_MTRRphysMask(0)) / 2].mask = data;
- break;
- case MSR_MTRRfix64K_00000:
- env->mtrr_fixed[ECX(env) - MSR_MTRRfix64K_00000] = data;
- break;
- case MSR_MTRRfix16K_80000:
- case MSR_MTRRfix16K_A0000:
- env->mtrr_fixed[ECX(env) - MSR_MTRRfix16K_80000 + 1] = data;
- break;
- case MSR_MTRRfix4K_C0000:
- case MSR_MTRRfix4K_C8000:
- case MSR_MTRRfix4K_D0000:
- case MSR_MTRRfix4K_D8000:
- case MSR_MTRRfix4K_E0000:
- case MSR_MTRRfix4K_E8000:
- case MSR_MTRRfix4K_F0000:
- case MSR_MTRRfix4K_F8000:
- env->mtrr_fixed[ECX(env) - MSR_MTRRfix4K_C0000 + 3] = data;
- break;
- case MSR_MTRRdefType:
- env->mtrr_deftype = data;
- break;
- default:
- break;
- }
-
- /* Related to support known hypervisor interface */
- /* if (g_hypervisor_iface)
- g_hypervisor_iface->wrmsr_handler(cs, msr, data);
-
- printf("write msr %llx\n", RCX(cs));*/
-}
-
static void exec_wrmsr(CPUX86State *env, struct x86_decode *decode)
{
- simulate_wrmsr(env);
+ hvf_simulate_wrmsr(env);
env->eip += decode->len;
}
diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h
index a1d1dc7d74..107c1f1ac8 100644
--- a/target/i386/hvf/x86_emu.h
+++ b/target/i386/hvf/x86_emu.h
@@ -36,9 +36,7 @@ extern const struct x86_emul_ops *emul_ops;
void init_emu(const struct x86_emul_ops *ops);
bool exec_instruction(CPUX86State *env, struct x86_decode *ins);
-
-void simulate_rdmsr(CPUX86State *env);
-void simulate_wrmsr(CPUX86State *env);
+void x86_emul_raise_exception(CPUX86State *env, int exception_index, int error_code);
target_ulong read_reg(CPUX86State *env, int reg, int size);
void write_reg(CPUX86State *env, int reg, target_ulong val, int size);
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 12/19] target/i386/hvf: provide and use simulate_{wrmsr, rdmsr} in emul_ops
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (10 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 11/19] target/i386/hvf: move and rename simulate_{rdmsr, wrmsr} Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 13/19] target/i386: rename lazy flags field and its type Wei Liu
` (9 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Change the first argument's type to be CPUState to match other hooks.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf-i386.h | 4 ++--
target/i386/hvf/hvf.c | 18 ++++++++++--------
target/i386/hvf/x86_emu.c | 4 ++--
target/i386/hvf/x86_emu.h | 2 ++
4 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h
index 044ad236ae..8c42ae6b01 100644
--- a/target/i386/hvf/hvf-i386.h
+++ b/target/i386/hvf/hvf-i386.h
@@ -19,8 +19,8 @@
uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg);
void hvf_handle_io(CPUState *, uint16_t, void *, int, int, int);
-void hvf_simulate_rdmsr(CPUX86State *env);
-void hvf_simulate_wrmsr(CPUX86State *env);
+void hvf_simulate_rdmsr(CPUState *cpu);
+void hvf_simulate_wrmsr(CPUState *cpu);
/* Host specific functions */
int hvf_inject_interrupt(CPUArchState *env, int vector);
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 88f5487b45..57a8029cfa 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -252,6 +252,8 @@ static const struct x86_emul_ops hvf_x86_emul_ops = {
.write_mem = hvf_write_mem,
.read_segment_descriptor = hvf_read_segment_descriptor,
.handle_io = hvf_handle_io,
+ .simulate_rdmsr = hvf_simulate_rdmsr,
+ .simulate_wrmsr = hvf_simulate_wrmsr,
};
int hvf_arch_init_vcpu(CPUState *cpu)
@@ -506,10 +508,10 @@ void hvf_store_regs(CPUState *cs)
macvm_set_rip(cs, env->eip);
}
-void hvf_simulate_rdmsr(CPUX86State *env)
+void hvf_simulate_rdmsr(CPUState *cs)
{
- X86CPU *cpu = env_archcpu(env);
- CPUState *cs = env_cpu(env);
+ X86CPU *cpu = X86_CPU(cs);
+ CPUX86State *env = &cpu->env;
uint32_t msr = ECX(env);
uint64_t val = 0;
@@ -611,10 +613,10 @@ void hvf_simulate_rdmsr(CPUX86State *env)
RDX(env) = (uint32_t)(val >> 32);
}
-void hvf_simulate_wrmsr(CPUX86State *env)
+void hvf_simulate_wrmsr(CPUState *cs)
{
- X86CPU *cpu = env_archcpu(env);
- CPUState *cs = env_cpu(env);
+ X86CPU *cpu = X86_CPU(cs);
+ CPUX86State *env = &cpu->env;
uint32_t msr = ECX(env);
uint64_t data = ((uint64_t)EDX(env) << 32) | EAX(env);
@@ -900,9 +902,9 @@ int hvf_vcpu_exec(CPUState *cpu)
{
hvf_load_regs(cpu);
if (exit_reason == EXIT_REASON_RDMSR) {
- hvf_simulate_rdmsr(env);
+ hvf_simulate_rdmsr(cpu);
} else {
- hvf_simulate_wrmsr(env);
+ hvf_simulate_wrmsr(cpu);
}
env->eip += ins_len;
hvf_store_regs(cpu);
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index b6e63daea4..304c1ef396 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -672,13 +672,13 @@ void x86_emul_raise_exception(CPUX86State *env, int exception_index, int error_c
static void exec_rdmsr(CPUX86State *env, struct x86_decode *decode)
{
- hvf_simulate_rdmsr(env);
+ emul_ops->simulate_rdmsr(env_cpu(env));
env->eip += decode->len;
}
static void exec_wrmsr(CPUX86State *env, struct x86_decode *decode)
{
- hvf_simulate_wrmsr(env);
+ emul_ops->simulate_wrmsr(env_cpu(env));
env->eip += decode->len;
}
diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h
index 107c1f1ac8..555b567e2c 100644
--- a/target/i386/hvf/x86_emu.h
+++ b/target/i386/hvf/x86_emu.h
@@ -30,6 +30,8 @@ struct x86_emul_ops {
enum X86Seg seg);
void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direction,
int size, int count);
+ void (*simulate_rdmsr)(CPUState *cs);
+ void (*simulate_wrmsr)(CPUState *cs);
};
extern const struct x86_emul_ops *emul_ops;
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 13/19] target/i386: rename lazy flags field and its type
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (11 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 12/19] target/i386/hvf: provide and use simulate_{wrmsr, rdmsr} in emul_ops Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 14/19] target/i386/hvf: drop unused headers Wei Liu
` (8 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
The same structure and code can be used by other accelerators. Drop
the hvf prefix in the type and field name.
No functional change.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/cpu.h | 6 ++--
target/i386/hvf/x86_flags.c | 56 ++++++++++++++++++-------------------
2 files changed, 31 insertions(+), 31 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index bfdb1f87a3..00bb2ed79a 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1772,10 +1772,10 @@ typedef struct CPUCaches {
CPUCacheInfo *l3_cache;
} CPUCaches;
-typedef struct HVFX86LazyFlags {
+typedef struct X86LazyFlags {
target_ulong result;
target_ulong auxbits;
-} HVFX86LazyFlags;
+} X86LazyFlags;
typedef struct CPUArchState {
/* standard registers */
@@ -2069,7 +2069,7 @@ typedef struct CPUArchState {
QemuMutex xen_timers_lock;
#endif
#if defined(CONFIG_HVF)
- HVFX86LazyFlags hvf_lflags;
+ X86LazyFlags lflags;
void *mmio_buf;
#endif
diff --git a/target/i386/hvf/x86_flags.c b/target/i386/hvf/x86_flags.c
index 03d6de5efc..3c02c9c563 100644
--- a/target/i386/hvf/x86_flags.c
+++ b/target/i386/hvf/x86_flags.c
@@ -62,7 +62,7 @@
#define SET_FLAGS_OSZAPC_SIZE(size, lf_carries, lf_result) { \
target_ulong temp = ((lf_carries) & (LF_MASK_AF)) | \
(((lf_carries) >> (size - 2)) << LF_BIT_PO); \
- env->hvf_lflags.result = (target_ulong)(int##size##_t)(lf_result); \
+ env->lflags.result = (target_ulong)(int##size##_t)(lf_result); \
if ((size) == 32) { \
temp = ((lf_carries) & ~(LF_MASK_PDB | LF_MASK_SD)); \
} else if ((size) == 16) { \
@@ -72,7 +72,7 @@
} else { \
VM_PANIC("unimplemented"); \
} \
- env->hvf_lflags.auxbits = (target_ulong)(uint32_t)temp; \
+ env->lflags.auxbits = (target_ulong)(uint32_t)temp; \
}
/* carries, result */
@@ -99,10 +99,10 @@
} else { \
VM_PANIC("unimplemented"); \
} \
- env->hvf_lflags.result = (target_ulong)(int##size##_t)(lf_result); \
- target_ulong delta_c = (env->hvf_lflags.auxbits ^ temp) & LF_MASK_CF; \
+ env->lflags.result = (target_ulong)(int##size##_t)(lf_result); \
+ target_ulong delta_c = (env->lflags.auxbits ^ temp) & LF_MASK_CF; \
delta_c ^= (delta_c >> 1); \
- env->hvf_lflags.auxbits = (target_ulong)(uint32_t)(temp ^ delta_c); \
+ env->lflags.auxbits = (target_ulong)(uint32_t)(temp ^ delta_c); \
}
/* carries, result */
@@ -116,8 +116,8 @@
void SET_FLAGS_OxxxxC(CPUX86State *env, uint32_t new_of, uint32_t new_cf)
{
uint32_t temp_po = new_of ^ new_cf;
- env->hvf_lflags.auxbits &= ~(LF_MASK_PO | LF_MASK_CF);
- env->hvf_lflags.auxbits |= (temp_po << LF_BIT_PO) | (new_cf << LF_BIT_CF);
+ env->lflags.auxbits &= ~(LF_MASK_PO | LF_MASK_CF);
+ env->lflags.auxbits |= (temp_po << LF_BIT_PO) | (new_cf << LF_BIT_CF);
}
void SET_FLAGS_OSZAPC_SUB32(CPUX86State *env, uint32_t v1, uint32_t v2,
@@ -213,27 +213,27 @@ void SET_FLAGS_OSZAPC_LOGIC8(CPUX86State *env, uint8_t v1, uint8_t v2,
bool get_PF(CPUX86State *env)
{
- uint32_t temp = (255 & env->hvf_lflags.result);
- temp = temp ^ (255 & (env->hvf_lflags.auxbits >> LF_BIT_PDB));
+ uint32_t temp = (255 & env->lflags.result);
+ temp = temp ^ (255 & (env->lflags.auxbits >> LF_BIT_PDB));
temp = (temp ^ (temp >> 4)) & 0x0F;
return (0x9669U >> temp) & 1;
}
void set_PF(CPUX86State *env, bool val)
{
- uint32_t temp = (255 & env->hvf_lflags.result) ^ (!val);
- env->hvf_lflags.auxbits &= ~(LF_MASK_PDB);
- env->hvf_lflags.auxbits |= (temp << LF_BIT_PDB);
+ uint32_t temp = (255 & env->lflags.result) ^ (!val);
+ env->lflags.auxbits &= ~(LF_MASK_PDB);
+ env->lflags.auxbits |= (temp << LF_BIT_PDB);
}
bool get_OF(CPUX86State *env)
{
- return ((env->hvf_lflags.auxbits + (1U << LF_BIT_PO)) >> LF_BIT_CF) & 1;
+ return ((env->lflags.auxbits + (1U << LF_BIT_PO)) >> LF_BIT_CF) & 1;
}
bool get_CF(CPUX86State *env)
{
- return (env->hvf_lflags.auxbits >> LF_BIT_CF) & 1;
+ return (env->lflags.auxbits >> LF_BIT_CF) & 1;
}
void set_OF(CPUX86State *env, bool val)
@@ -250,45 +250,45 @@ void set_CF(CPUX86State *env, bool val)
bool get_AF(CPUX86State *env)
{
- return (env->hvf_lflags.auxbits >> LF_BIT_AF) & 1;
+ return (env->lflags.auxbits >> LF_BIT_AF) & 1;
}
void set_AF(CPUX86State *env, bool val)
{
- env->hvf_lflags.auxbits &= ~(LF_MASK_AF);
- env->hvf_lflags.auxbits |= val << LF_BIT_AF;
+ env->lflags.auxbits &= ~(LF_MASK_AF);
+ env->lflags.auxbits |= val << LF_BIT_AF;
}
bool get_ZF(CPUX86State *env)
{
- return !env->hvf_lflags.result;
+ return !env->lflags.result;
}
void set_ZF(CPUX86State *env, bool val)
{
if (val) {
- env->hvf_lflags.auxbits ^=
- (((env->hvf_lflags.result >> LF_SIGN_BIT) & 1) << LF_BIT_SD);
+ env->lflags.auxbits ^=
+ (((env->lflags.result >> LF_SIGN_BIT) & 1) << LF_BIT_SD);
/* merge the parity bits into the Parity Delta Byte */
- uint32_t temp_pdb = (255 & env->hvf_lflags.result);
- env->hvf_lflags.auxbits ^= (temp_pdb << LF_BIT_PDB);
+ uint32_t temp_pdb = (255 & env->lflags.result);
+ env->lflags.auxbits ^= (temp_pdb << LF_BIT_PDB);
/* now zero the .result value */
- env->hvf_lflags.result = 0;
+ env->lflags.result = 0;
} else {
- env->hvf_lflags.result |= (1 << 8);
+ env->lflags.result |= (1 << 8);
}
}
bool get_SF(CPUX86State *env)
{
- return ((env->hvf_lflags.result >> LF_SIGN_BIT) ^
- (env->hvf_lflags.auxbits >> LF_BIT_SD)) & 1;
+ return ((env->lflags.result >> LF_SIGN_BIT) ^
+ (env->lflags.auxbits >> LF_BIT_SD)) & 1;
}
void set_SF(CPUX86State *env, bool val)
{
bool temp_sf = get_SF(env);
- env->hvf_lflags.auxbits ^= (temp_sf ^ val) << LF_BIT_SD;
+ env->lflags.auxbits ^= (temp_sf ^ val) << LF_BIT_SD;
}
void lflags_to_rflags(CPUX86State *env)
@@ -303,7 +303,7 @@ void lflags_to_rflags(CPUX86State *env)
void rflags_to_lflags(CPUX86State *env)
{
- env->hvf_lflags.auxbits = env->hvf_lflags.result = 0;
+ env->lflags.auxbits = env->lflags.result = 0;
set_OF(env, env->eflags & CC_O);
set_SF(env, env->eflags & CC_S);
set_ZF(env, env->eflags & CC_Z);
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 14/19] target/i386/hvf: drop unused headers
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (12 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 13/19] target/i386: rename lazy flags field and its type Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 15/19] target/i386/hvf: drop some dead code Wei Liu
` (7 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/x86_decode.c | 3 ---
target/i386/hvf/x86_emu.c | 4 ----
2 files changed, 7 deletions(-)
diff --git a/target/i386/hvf/x86_decode.c b/target/i386/hvf/x86_decode.c
index 31285952ad..ffece4773b 100644
--- a/target/i386/hvf/x86_decode.c
+++ b/target/i386/hvf/x86_decode.c
@@ -20,10 +20,7 @@
#include "panic.h"
#include "x86_decode.h"
-#include "vmx.h"
#include "x86_emu.h"
-#include "x86_mmu.h"
-#include "x86_descr.h"
#define OPCODE_ESCAPE 0xf
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index 304c1ef396..84f97ed386 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -40,11 +40,7 @@
#include "x86_decode.h"
#include "x86.h"
#include "x86_emu.h"
-#include "x86_mmu.h"
#include "x86_flags.h"
-#include "vmcs.h"
-#include "vmx.h"
-#include "hvf-i386.h"
#define EXEC_2OP_FLAGS_CMD(env, decode, cmd, FLAGS_FUNC, save_res) \
{ \
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 15/19] target/i386/hvf: drop some dead code
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (13 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 14/19] target/i386/hvf: drop unused headers Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 16/19] target/i386/hvf: rename some include guards Wei Liu
` (6 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/x86_emu.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index 84f97ed386..44ef068bef 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -1240,10 +1240,6 @@ static void init_cmd_handler(void)
bool exec_instruction(CPUX86State *env, struct x86_decode *ins)
{
- /*if (hvf_vcpu_id(cs))
- printf("%d, %llx: exec_instruction %s\n", hvf_vcpu_id(cs), env->eip,
- decode_cmd_to_string(ins->cmd));*/
-
if (!_cmd_handler[ins->cmd].handler) {
printf("Unimplemented handler (%llx) for %d (%x %x) \n", env->eip,
ins->cmd, ins->opcode[0],
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 16/19] target/i386/hvf: rename some include guards
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (14 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 15/19] target/i386/hvf: drop some dead code Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 17/19] target/i386: add a directory for x86 instruction emulator Wei Liu
` (5 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
These headers will be moved out to its own component.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/x86.h | 4 ++--
target/i386/hvf/x86_decode.h | 4 ++--
target/i386/hvf/x86_flags.h | 6 +++---
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/target/i386/hvf/x86.h b/target/i386/hvf/x86.h
index 063cd0b83e..73edccfba0 100644
--- a/target/i386/hvf/x86.h
+++ b/target/i386/hvf/x86.h
@@ -16,8 +16,8 @@
* License along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef HVF_X86_H
-#define HVF_X86_H
+#ifndef X86_EMU_DEFS_H
+#define X86_EMU_DEFS_H
typedef struct x86_register {
union {
diff --git a/target/i386/hvf/x86_decode.h b/target/i386/hvf/x86_decode.h
index a2d7a2a27b..930d965164 100644
--- a/target/i386/hvf/x86_decode.h
+++ b/target/i386/hvf/x86_decode.h
@@ -15,8 +15,8 @@
* License along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef HVF_X86_DECODE_H
-#define HVF_X86_DECODE_H
+#ifndef X86_EMU_DECODE_H
+#define X86_EMU_DECODE_H
#include "cpu.h"
#include "x86.h"
diff --git a/target/i386/hvf/x86_flags.h b/target/i386/hvf/x86_flags.h
index 75c2a7feab..6c175007b5 100644
--- a/target/i386/hvf/x86_flags.h
+++ b/target/i386/hvf/x86_flags.h
@@ -21,8 +21,8 @@
* x86 eflags functions
*/
-#ifndef X86_FLAGS_H
-#define X86_FLAGS_H
+#ifndef X86_EMU_FLAGS_H
+#define X86_EMU_FLAGS_H
#include "cpu.h"
void lflags_to_rflags(CPUX86State *env);
@@ -78,4 +78,4 @@ void SET_FLAGS_OSZAPC_LOGIC16(CPUX86State *env, uint16_t v1, uint16_t v2,
void SET_FLAGS_OSZAPC_LOGIC8(CPUX86State *env, uint8_t v1, uint8_t v2,
uint8_t diff);
-#endif /* X86_FLAGS_H */
+#endif /* X86_EMU_FLAGS_H */
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 17/19] target/i386: add a directory for x86 instruction emulator
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (15 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 16/19] target/i386/hvf: rename some include guards Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 18/19] target/i386/x86-insn-emul: add a panic.h Wei Liu
` (4 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/meson.build | 1 +
target/i386/x86-insn-emul/meson.build | 0
2 files changed, 1 insertion(+)
create mode 100644 target/i386/x86-insn-emul/meson.build
diff --git a/target/i386/meson.build b/target/i386/meson.build
index 2e9c472f49..e93c1c20ca 100644
--- a/target/i386/meson.build
+++ b/target/i386/meson.build
@@ -31,6 +31,7 @@ subdir('whpx')
subdir('nvmm')
subdir('hvf')
subdir('tcg')
+subdir('x86-insn-emul')
target_arch += {'i386': i386_ss}
target_system_arch += {'i386': i386_system_ss}
diff --git a/target/i386/x86-insn-emul/meson.build b/target/i386/x86-insn-emul/meson.build
new file mode 100644
index 0000000000..e69de29bb2
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 18/19] target/i386/x86-insn-emul: add a panic.h
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (16 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 17/19] target/i386: add a directory for x86 instruction emulator Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 8:36 ` [RFC PATCH v1 19/19] target/i386: move x86 instruction emulator out of hvf Wei Liu
` (3 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
The macros will be used by the instruction emulator. The code is the same as
the one under hvf.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/x86-insn-emul/panic.h | 45 +++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 target/i386/x86-insn-emul/panic.h
diff --git a/target/i386/x86-insn-emul/panic.h b/target/i386/x86-insn-emul/panic.h
new file mode 100644
index 0000000000..71c24874ba
--- /dev/null
+++ b/target/i386/x86-insn-emul/panic.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2016 Veertu Inc,
+ * Copyright (C) 2017 Google Inc,
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef X86_EMU_PANIC_H
+#define X86_EMU_PANIC_H
+
+#define VM_PANIC(x) {\
+ printf("%s\n", x); \
+ abort(); \
+}
+
+#define VM_PANIC_ON(x) {\
+ if (x) { \
+ printf("%s\n", #x); \
+ abort(); \
+ } \
+}
+
+#define VM_PANIC_EX(...) {\
+ printf(__VA_ARGS__); \
+ abort(); \
+}
+
+#define VM_PANIC_ON_EX(x, ...) {\
+ if (x) { \
+ printf(__VA_ARGS__); \
+ abort(); \
+ } \
+}
+
+#endif
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* [RFC PATCH v1 19/19] target/i386: move x86 instruction emulator out of hvf
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (17 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 18/19] target/i386/x86-insn-emul: add a panic.h Wei Liu
@ 2025-02-21 8:36 ` Wei Liu
2025-02-21 16:36 ` [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Paolo Bonzini
` (2 subsequent siblings)
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 8:36 UTC (permalink / raw)
To: qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Move x86_decode, x86_emu, x86_flags and some headers to the new location.
Fix up all the inclusion sites in hvf.
Signed-off-by: Wei Liu <liuwe@linux.microsoft.com>
---
target/i386/hvf/hvf.c | 8 ++++----
target/i386/hvf/meson.build | 3 ---
target/i386/hvf/vmx.h | 2 +-
target/i386/hvf/x86.c | 4 ++--
target/i386/hvf/x86_cpuid.c | 2 +-
target/i386/hvf/x86_descr.h | 2 +-
target/i386/hvf/x86_mmu.c | 2 +-
target/i386/hvf/x86_task.c | 6 +++---
target/i386/hvf/x86hvf.c | 2 +-
target/i386/x86-insn-emul/meson.build | 5 +++++
target/i386/{hvf => x86-insn-emul}/x86.h | 0
target/i386/{hvf => x86-insn-emul}/x86_decode.c | 0
target/i386/{hvf => x86-insn-emul}/x86_decode.h | 0
target/i386/{hvf => x86-insn-emul}/x86_emu.c | 0
target/i386/{hvf => x86-insn-emul}/x86_emu.h | 0
target/i386/{hvf => x86-insn-emul}/x86_flags.c | 0
target/i386/{hvf => x86-insn-emul}/x86_flags.h | 0
17 files changed, 19 insertions(+), 17 deletions(-)
rename target/i386/{hvf => x86-insn-emul}/x86.h (100%)
rename target/i386/{hvf => x86-insn-emul}/x86_decode.c (100%)
rename target/i386/{hvf => x86-insn-emul}/x86_decode.h (100%)
rename target/i386/{hvf => x86-insn-emul}/x86_emu.c (100%)
rename target/i386/{hvf => x86-insn-emul}/x86_emu.h (100%)
rename target/i386/{hvf => x86-insn-emul}/x86_flags.c (100%)
rename target/i386/{hvf => x86-insn-emul}/x86_flags.h (100%)
diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c
index 57a8029cfa..aeef3dbde6 100644
--- a/target/i386/hvf/hvf.c
+++ b/target/i386/hvf/hvf.c
@@ -59,12 +59,12 @@
#include "hvf-i386.h"
#include "vmcs.h"
#include "vmx.h"
-#include "x86.h"
+#include "x86-insn-emul/x86.h"
#include "x86_descr.h"
-#include "x86_flags.h"
+#include "x86-insn-emul/x86_flags.h"
#include "x86_mmu.h"
-#include "x86_decode.h"
-#include "x86_emu.h"
+#include "x86-insn-emul/x86_decode.h"
+#include "x86-insn-emul/x86_emu.h"
#include "x86_task.h"
#include "x86hvf.h"
diff --git a/target/i386/hvf/meson.build b/target/i386/hvf/meson.build
index 05c3c8cf18..519d190f0e 100644
--- a/target/i386/hvf/meson.build
+++ b/target/i386/hvf/meson.build
@@ -2,10 +2,7 @@ i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
'hvf.c',
'x86.c',
'x86_cpuid.c',
- 'x86_decode.c',
'x86_descr.c',
- 'x86_emu.c',
- 'x86_flags.c',
'x86_mmu.c',
'x86_task.c',
'x86hvf.c',
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 80ce26279b..d012781d46 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -29,7 +29,7 @@
#include <Hypervisor/hv_vmx.h>
#include "vmcs.h"
#include "cpu.h"
-#include "x86.h"
+#include "x86-insn-emul/x86.h"
#include "system/hvf.h"
#include "system/hvf_int.h"
diff --git a/target/i386/hvf/x86.c b/target/i386/hvf/x86.c
index a0ede13886..3b9d0716fe 100644
--- a/target/i386/hvf/x86.c
+++ b/target/i386/hvf/x86.c
@@ -19,8 +19,8 @@
#include "qemu/osdep.h"
#include "cpu.h"
-#include "x86_decode.h"
-#include "x86_emu.h"
+#include "x86-insn-emul/x86_decode.h"
+#include "x86-insn-emul/x86_emu.h"
#include "vmcs.h"
#include "vmx.h"
#include "x86_mmu.h"
diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c
index ae836f65cc..1b7a3579c8 100644
--- a/target/i386/hvf/x86_cpuid.c
+++ b/target/i386/hvf/x86_cpuid.c
@@ -24,7 +24,7 @@
#include "qemu/cpuid.h"
#include "host/cpuinfo.h"
#include "cpu.h"
-#include "x86.h"
+#include "x86-insn-emul/x86.h"
#include "vmx.h"
#include "system/hvf.h"
#include "hvf-i386.h"
diff --git a/target/i386/hvf/x86_descr.h b/target/i386/hvf/x86_descr.h
index ce5de98349..2b403b36ce 100644
--- a/target/i386/hvf/x86_descr.h
+++ b/target/i386/hvf/x86_descr.h
@@ -19,7 +19,7 @@
#ifndef HVF_X86_DESCR_H
#define HVF_X86_DESCR_H
-#include "x86.h"
+#include "x86-insn-emul/x86.h"
typedef struct vmx_segment {
uint16_t sel;
diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c
index 579d0c3a4c..648ff6f7f2 100644
--- a/target/i386/hvf/x86_mmu.c
+++ b/target/i386/hvf/x86_mmu.c
@@ -19,7 +19,7 @@
#include "qemu/osdep.h"
#include "panic.h"
#include "cpu.h"
-#include "x86.h"
+#include "x86-insn-emul/x86.h"
#include "x86_mmu.h"
#include "vmcs.h"
#include "vmx.h"
diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c
index 161217991f..88b1c0a8bf 100644
--- a/target/i386/hvf/x86_task.c
+++ b/target/i386/hvf/x86_task.c
@@ -14,11 +14,11 @@
#include "hvf-i386.h"
#include "vmcs.h"
#include "vmx.h"
-#include "x86.h"
+#include "x86-insn-emul/x86.h"
#include "x86_descr.h"
#include "x86_mmu.h"
-#include "x86_decode.h"
-#include "x86_emu.h"
+#include "x86-insn-emul/x86_decode.h"
+#include "x86-insn-emul/x86_emu.h"
#include "x86_task.h"
#include "x86hvf.h"
diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c
index 531a340b37..2c0d779bca 100644
--- a/target/i386/hvf/x86hvf.c
+++ b/target/i386/hvf/x86hvf.c
@@ -24,7 +24,7 @@
#include "vmcs.h"
#include "cpu.h"
#include "x86_descr.h"
-#include "x86_decode.h"
+#include "x86-insn-emul/x86_decode.h"
#include "system/hw_accel.h"
#include "hw/i386/apic_internal.h"
diff --git a/target/i386/x86-insn-emul/meson.build b/target/i386/x86-insn-emul/meson.build
index e69de29bb2..4edd4f462f 100644
--- a/target/i386/x86-insn-emul/meson.build
+++ b/target/i386/x86-insn-emul/meson.build
@@ -0,0 +1,5 @@
+i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
+ 'x86_decode.c',
+ 'x86_emu.c',
+ 'x86_flags.c',
+))
diff --git a/target/i386/hvf/x86.h b/target/i386/x86-insn-emul/x86.h
similarity index 100%
rename from target/i386/hvf/x86.h
rename to target/i386/x86-insn-emul/x86.h
diff --git a/target/i386/hvf/x86_decode.c b/target/i386/x86-insn-emul/x86_decode.c
similarity index 100%
rename from target/i386/hvf/x86_decode.c
rename to target/i386/x86-insn-emul/x86_decode.c
diff --git a/target/i386/hvf/x86_decode.h b/target/i386/x86-insn-emul/x86_decode.h
similarity index 100%
rename from target/i386/hvf/x86_decode.h
rename to target/i386/x86-insn-emul/x86_decode.h
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/x86-insn-emul/x86_emu.c
similarity index 100%
rename from target/i386/hvf/x86_emu.c
rename to target/i386/x86-insn-emul/x86_emu.c
diff --git a/target/i386/hvf/x86_emu.h b/target/i386/x86-insn-emul/x86_emu.h
similarity index 100%
rename from target/i386/hvf/x86_emu.h
rename to target/i386/x86-insn-emul/x86_emu.h
diff --git a/target/i386/hvf/x86_flags.c b/target/i386/x86-insn-emul/x86_flags.c
similarity index 100%
rename from target/i386/hvf/x86_flags.c
rename to target/i386/x86-insn-emul/x86_flags.c
diff --git a/target/i386/hvf/x86_flags.h b/target/i386/x86-insn-emul/x86_flags.h
similarity index 100%
rename from target/i386/hvf/x86_flags.h
rename to target/i386/x86-insn-emul/x86_flags.h
--
2.39.5 (Apple Git-154)
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [RFC PATCH v1 00/19] Factor out HVF's instruction emulator
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (18 preceding siblings ...)
2025-02-21 8:36 ` [RFC PATCH v1 19/19] target/i386: move x86 instruction emulator out of hvf Wei Liu
@ 2025-02-21 16:36 ` Paolo Bonzini
2025-02-21 18:56 ` Wei Liu
2025-02-21 16:53 ` Peter Maydell
2025-03-05 16:50 ` Wei Liu
21 siblings, 1 reply; 26+ messages in thread
From: Paolo Bonzini @ 2025-02-21 16:36 UTC (permalink / raw)
To: Wei Liu, qemu-devel
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv
On 2/21/25 09:36, Wei Liu wrote:
> This patch series attempts to make the instruction emulator in HVF a common
> component for the i386 target. It removes HVF specific code by either using a
> set of hooks or moving it to better locations. The new incoming MSHV
> accelerator will implement the hooks, and where necessary, enhance the emulator
> and / or add new hooks.
Good!
> This patch series is in RFC state. The patches have been lightly tested by
> running a Linux VM on an Intel-based Mac. We hope to get some feedback on the
> overall approach, and let the community bikeshed a bit about names and
> location.
For the bikeshedding my only suggestion is to replace mmio_buf with
emu_mmio_buf, and replace x86-insn-emul, with just "emulate" or
something like that. That is, no need to repeat x86 inside the
target/i386 directory, especially since the filenames also start with x86.
> First two patches fix issues in the existing code. They can be applied
> regardless of the discussion around the overall approach.
These four can also be applied:
target/i386/hvf: use x86_segment in x86_decode.c
target/i386/hvf: move and rename {load, store}_regs
target/i386/hvf: move and rename simulate_{rdmsr, wrmsr}
target/i386/hvf: drop some dead code
> The checkpatch script complains about a few things. Some are from the original
> code I didn't touch. For the code I changed or moved, it complains that some
> lines are long (>80). Seeing that the rule was not followed strictly in the old
> code base, I held off fixing that class of issues. The other thing it complains
> is there is no entry for the new directory in MAINTAINERS. We can fix these
> issues if they are deemed important.
Yes, no problem. The new directory thing is just a warning but I think
you could add a new entry with both MSHV and HVF people on it.
> Please let us know what you think. The alternative is to duplicate the
> instruction emulator code in the mshv accelerator. That looks to be a worse
> option.
Yes, definitely.
Paolo
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [RFC PATCH v1 00/19] Factor out HVF's instruction emulator
2025-02-21 16:36 ` [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Paolo Bonzini
@ 2025-02-21 18:56 ` Wei Liu
0 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 18:56 UTC (permalink / raw)
To: Paolo Bonzini
Cc: Wei Liu, qemu-devel, wei.liu, dirty, rbolshakov, phil, jinankjain,
liuwe, muislam, ziqiaozhou, mukeshrathor, magnuskulke, prapal,
jpiotrowski, deviv
On Fri, Feb 21, 2025 at 05:36:39PM +0100, Paolo Bonzini wrote:
> On 2/21/25 09:36, Wei Liu wrote:
> > This patch series attempts to make the instruction emulator in HVF a common
> > component for the i386 target. It removes HVF specific code by either using a
> > set of hooks or moving it to better locations. The new incoming MSHV
> > accelerator will implement the hooks, and where necessary, enhance the emulator
> > and / or add new hooks.
>
> Good!
>
> > This patch series is in RFC state. The patches have been lightly tested by
> > running a Linux VM on an Intel-based Mac. We hope to get some feedback on the
> > overall approach, and let the community bikeshed a bit about names and
> > location.
>
> For the bikeshedding my only suggestion is to replace mmio_buf with
> emu_mmio_buf, and replace x86-insn-emul, with just "emulate" or something
> like that. That is, no need to repeat x86 inside the target/i386 directory,
> especially since the filenames also start with x86.
>
No problem. We can make the changes in the next version.
> > First two patches fix issues in the existing code. They can be applied
> > regardless of the discussion around the overall approach.
>
> These four can also be applied:
>
> target/i386/hvf: use x86_segment in x86_decode.c
> target/i386/hvf: move and rename {load, store}_regs
> target/i386/hvf: move and rename simulate_{rdmsr, wrmsr}
> target/i386/hvf: drop some dead code
>
> > The checkpatch script complains about a few things. Some are from the original
> > code I didn't touch. For the code I changed or moved, it complains that some
> > lines are long (>80). Seeing that the rule was not followed strictly in the old
> > code base, I held off fixing that class of issues. The other thing it complains
> > is there is no entry for the new directory in MAINTAINERS. We can fix these
> > issues if they are deemed important.
>
> Yes, no problem. The new directory thing is just a warning but I think you
> could add a new entry with both MSHV and HVF people on it.
>
Okay, that works, too.
> > Please let us know what you think. The alternative is to duplicate the
> > instruction emulator code in the mshv accelerator. That looks to be a worse
> > option.
> Yes, definitely.
Thank you for the feedback.
Wei.
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [RFC PATCH v1 00/19] Factor out HVF's instruction emulator
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (19 preceding siblings ...)
2025-02-21 16:36 ` [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Paolo Bonzini
@ 2025-02-21 16:53 ` Peter Maydell
2025-02-21 19:05 ` Wei Liu
2025-03-05 16:50 ` Wei Liu
21 siblings, 1 reply; 26+ messages in thread
From: Peter Maydell @ 2025-02-21 16:53 UTC (permalink / raw)
To: Wei Liu
Cc: qemu-devel, wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe,
muislam, ziqiaozhou, mukeshrathor, magnuskulke, prapal,
jpiotrowski, deviv
On Fri, 21 Feb 2025 at 14:02, Wei Liu <liuwe@linux.microsoft.com> wrote:
>
> Hi,
>
> Microsoft's Linux Systems Group developed a Linux driver for the Microsoft
> Hypervisor (MSHV for short). The driver is being upstreamed. The first
> supported VMM is Cloud Hypervisor. QEMU will be the second supported
> VMM.
>
> The plan is to write an mshv accelerator in QEMU. The accelerator is still in
> the works.
>
> MSHV doesn't emulate instructions. VMMs are supposed to bring their own
> instruction emulator. The path we've chosen is to reuse what's already in QEMU.
> The instruction emulator in HVF looks good for what we need.
>
> This patch series attempts to make the instruction emulator in HVF a common
> component for the i386 target. It removes HVF specific code by either using a
> set of hooks or moving it to better locations. The new incoming MSHV
> accelerator will implement the hooks, and where necessary, enhance the emulator
> and / or add new hooks.
If you want to make the hvf decoder more widely used you might want
to look at this old patch to it that was never applied (issues in
code review not addressed by the submitter):
https://lore.kernel.org/qemu-devel/CAFEAcA8yaBOD3KXc-DY94oqzC5wkCENPkePgVCybqR=9NmdQFQ@mail.gmail.com/
which is trying to fix a problem where an overlong string of
prefix bytes causes the decoder to misbehave.
(PS: if in the future you should ever find yourself wanting to do an
equivalent "decode loads/stores the hypervisor doesn't handle"
for Arm, use decodetree, not a hand-rolled decoder...)
thanks
-- PMM
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [RFC PATCH v1 00/19] Factor out HVF's instruction emulator
2025-02-21 16:53 ` Peter Maydell
@ 2025-02-21 19:05 ` Wei Liu
0 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-02-21 19:05 UTC (permalink / raw)
To: Peter Maydell
Cc: Wei Liu, qemu-devel, wei.liu, dirty, rbolshakov, phil, jinankjain,
liuwe, muislam, ziqiaozhou, mukeshrathor, magnuskulke, prapal,
jpiotrowski, deviv
On Fri, Feb 21, 2025 at 04:53:26PM +0000, Peter Maydell wrote:
> On Fri, 21 Feb 2025 at 14:02, Wei Liu <liuwe@linux.microsoft.com> wrote:
> >
> > Hi,
> >
> > Microsoft's Linux Systems Group developed a Linux driver for the Microsoft
> > Hypervisor (MSHV for short). The driver is being upstreamed. The first
> > supported VMM is Cloud Hypervisor. QEMU will be the second supported
> > VMM.
> >
> > The plan is to write an mshv accelerator in QEMU. The accelerator is still in
> > the works.
> >
> > MSHV doesn't emulate instructions. VMMs are supposed to bring their own
> > instruction emulator. The path we've chosen is to reuse what's already in QEMU.
> > The instruction emulator in HVF looks good for what we need.
> >
> > This patch series attempts to make the instruction emulator in HVF a common
> > component for the i386 target. It removes HVF specific code by either using a
> > set of hooks or moving it to better locations. The new incoming MSHV
> > accelerator will implement the hooks, and where necessary, enhance the emulator
> > and / or add new hooks.
>
> If you want to make the hvf decoder more widely used you might want
> to look at this old patch to it that was never applied (issues in
> code review not addressed by the submitter):
>
> https://lore.kernel.org/qemu-devel/CAFEAcA8yaBOD3KXc-DY94oqzC5wkCENPkePgVCybqR=9NmdQFQ@mail.gmail.com/
>
> which is trying to fix a problem where an overlong string of
> prefix bytes causes the decoder to misbehave.
>
Thanks for the information.
> (PS: if in the future you should ever find yourself wanting to do an
> equivalent "decode loads/stores the hypervisor doesn't handle"
> for Arm, use decodetree, not a hand-rolled decoder...)
>
Noted. Yep, we have plans to add ARM64 support in the future.
Thanks,
Wei.
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [RFC PATCH v1 00/19] Factor out HVF's instruction emulator
2025-02-21 8:36 [RFC PATCH v1 00/19] Factor out HVF's instruction emulator Wei Liu
` (20 preceding siblings ...)
2025-02-21 16:53 ` Peter Maydell
@ 2025-03-05 16:50 ` Wei Liu
21 siblings, 0 replies; 26+ messages in thread
From: Wei Liu @ 2025-03-05 16:50 UTC (permalink / raw)
To: qemu-devel, dirty, rbolshakov, phil
Cc: wei.liu, dirty, rbolshakov, phil, jinankjain, liuwe, muislam,
ziqiaozhou, mukeshrathor, magnuskulke, prapal, jpiotrowski, deviv,
Wei Liu
Hi Cameron, Roman and Phil,
On Fri, Feb 21, 2025 at 12:36:08AM -0800, Wei Liu wrote:
> Hi,
>
> Microsoft's Linux Systems Group developed a Linux driver for the Microsoft
> Hypervisor (MSHV for short). The driver is being upstreamed. The first
> supported VMM is Cloud Hypervisor. QEMU will be the second supported
> VMM.
>
> The plan is to write an mshv accelerator in QEMU. The accelerator is still in
> the works.
>
> MSHV doesn't emulate instructions. VMMs are supposed to bring their own
> instruction emulator. The path we've chosen is to reuse what's already in QEMU.
> The instruction emulator in HVF looks good for what we need.
>
> This patch series attempts to make the instruction emulator in HVF a common
> component for the i386 target. It removes HVF specific code by either using a
> set of hooks or moving it to better locations. The new incoming MSHV
> accelerator will implement the hooks, and where necessary, enhance the emulator
> and / or add new hooks.
>
> This patch series is in RFC state. The patches have been lightly tested by
> running a Linux VM on an Intel-based Mac. We hope to get some feedback on the
> overall approach, and let the community bikeshed a bit about names and
> location.
>
> First two patches fix issues in the existing code. They can be applied
> regardless of the discussion around the overall approach.
>
> The checkpatch script complains about a few things. Some are from the original
> code I didn't touch. For the code I changed or moved, it complains that some
> lines are long (>80). Seeing that the rule was not followed strictly in the old
> code base, I held off fixing that class of issues. The other thing it complains
> is there is no entry for the new directory in MAINTAINERS. We can fix these
> issues if they are deemed important.
>
> Please let us know what you think. The alternative is to duplicate the
> instruction emulator code in the mshv accelerator. That looks to be a worse
> option.
>
As the maintainers of this code, do you have any comments on this?
I have addressed the comments from Paolo. I'm wondering if I should wait
for your input or just post another version.
Thanks,
Wei.
^ permalink raw reply [flat|nested] 26+ messages in thread