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From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, Alistair.Francis@wdc.com
Subject: Re: [PATCH 2/2] tcg/riscv: Use BEXTI for single-bit extractions
Date: Tue, 7 Jan 2025 07:27:01 -0800	[thread overview]
Message-ID: <4f5fb5fe-2f12-4fdf-9fab-600742b72a99@linaro.org> (raw)
In-Reply-To: <05497e58-43ad-41de-b868-223aafa6ed3e@linaro.org>

On 1/7/25 02:29, Philippe Mathieu-Daudé wrote:
> Hi Richard,
> 
> On 2/1/25 19:16, Richard Henderson wrote:
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   tcg/riscv/tcg-target-has.h |  8 +++++++-
>>   tcg/riscv/tcg-target.c.inc | 13 +++++++++++--
>>   2 files changed, 18 insertions(+), 3 deletions(-)
>>
>> diff --git a/tcg/riscv/tcg-target-has.h b/tcg/riscv/tcg-target-has.h
>> index 10e61edc45..ea38ee5cbb 100644
>> --- a/tcg/riscv/tcg-target-has.h
>> +++ b/tcg/riscv/tcg-target-has.h
>> @@ -64,7 +64,13 @@ tcg_target_extract_valid(TCGType type, unsigned ofs, unsigned len)
>>           /* ofs > 0 uses SRLIW; ofs == 0 uses add.uw. */
>>           return ofs || (cpuinfo & CPUINFO_ZBA);
>>       }
>> -    return (cpuinfo & CPUINFO_ZBB) && ofs == 0 && len == 16;
>> +    switch (len) {
>> +    case 1:
>> +        return (cpuinfo & CPUINFO_ZBS) && ofs != 0;
> 
> Why can't we have ofs=0?

To prefer ANDI.


r~


      reply	other threads:[~2025-01-07 15:27 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-02 18:15 [PATCH 0/2] tcg/riscv: Use BEXTI for single-bit extractions Richard Henderson
2025-01-02 18:16 ` [PATCH 1/2] util/cpuinfo-riscv: Detect Zbs Richard Henderson
2025-01-06  0:44   ` Alistair Francis
2025-01-07  9:05   ` Philippe Mathieu-Daudé
2025-01-02 18:16 ` [PATCH 2/2] tcg/riscv: Use BEXTI for single-bit extractions Richard Henderson
2025-01-06  0:45   ` Alistair Francis
2025-01-07 10:29   ` Philippe Mathieu-Daudé
2025-01-07 15:27     ` Richard Henderson [this message]

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