Re: [Qemu-devel] [PATCH 2/4] target/arm: Rebuild hflags at el changes and MSR writes

[Richard Henderson <richard.henderson@linaro.org>]

On 2/19/19 6:48 AM, Alex Bennée wrote:
>> +++ b/target/arm/translate-a64.c
>> @@ -1841,11 +1841,15 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
>>          /* I/O operations must end the TB here (whether read or write) */
>>          gen_io_end();
>>          s->base.is_jmp = DISAS_UPDATE;
>> -    } else if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) {
>> +    }
>> +    if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) {
> Does this potentially introduce a icount bug (or fix an existing bug)?
> 
>>          /* We default to ending the TB on a coprocessor register write,
>>           * but allow this to be suppressed by the register definition
>>           * (usually only necessary to work around guest bugs).
>>           */
>> +        TCGv_i32 tcg_el = tcg_const_i32(s->current_el);
>> +        gen_helper_rebuild_hflags_a64(cpu_env, tcg_el);
>> +        tcg_temp_free_i32(tcg_el);
>>          s->base.is_jmp = DISAS_UPDATE;
>>      }

Neither.

Previously, all that was required was that either icount or !SUPPRESS_TB_END
and a TB, and that was done simply by setting DISAS_UPDATE.  Which both if
blocks did.

Now, icount ends a TB (still by setting DISAS_UPDATE).  But if !SUPPRESS_TB_END
then we must also rebuild hflags (with a possible harmless double-set of
DISAS_UPDATE).


r~