From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: "Alexander Graf" <agraf@csgraf.de>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Julian Armistead" <julian.armistead@linaro.org>,
"Cameron Esfahani" <dirty@apple.com>,
"Mark Burton" <mburton@qti.qualcomm.com>,
"Thomas Huth" <thuth@redhat.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>
Subject: Re: [RFC PATCH RESEND 10/42] accel/split: Define and allocate AccelCPUState
Date: Sat, 21 Jun 2025 19:35:49 -0700 [thread overview]
Message-ID: <4f844970-0fa9-418d-a0bf-8f96851a10d8@linaro.org> (raw)
In-Reply-To: <20250620172751.94231-11-philmd@linaro.org>
On 6/20/25 10:27, Philippe Mathieu-Daudé wrote:
> AccelCPUState is where we store per-vCPU accelerator
> related information.
>
> FIXME: structures might clash so add padding (ok with TCG+HVF)
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> accel/split/split-accel.h | 7 +++++++
> accel/split/split-accel-ops.c | 9 ++++++++-
> 2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/accel/split/split-accel.h b/accel/split/split-accel.h
> index 19fb530f207..87a08454ce6 100644
> --- a/accel/split/split-accel.h
> +++ b/accel/split/split-accel.h
> @@ -38,4 +38,11 @@ struct SplitAccelState {
> char *sw_name;
> };
>
> +struct AccelCPUState {
> + char pad[128];
That's a pretty big fixme.
Is this a problem of name overloading?
r~
> +
> + AccelState *accel;
> + bool use_hw;
> +};
> +
> #endif /* SPLIT_ACCEL_H */
> diff --git a/accel/split/split-accel-ops.c b/accel/split/split-accel-ops.c
> index 294ea79420e..efef0d60fde 100644
> --- a/accel/split/split-accel-ops.c
> +++ b/accel/split/split-accel-ops.c
> @@ -12,10 +12,13 @@
> #include "exec/cpu-common.h"
> #include "system/accel-ops.h"
> #include "system/cpus.h"
> +#include "split-accel.h"
>
> static void *split_cpu_thread_routine(void *arg)
> {
> + AccelState *as = current_accel();
> CPUState *cpu = arg;
> + AccelCPUState *acs;
> int r;
>
> /* TODO: check accel allowed */
> @@ -29,7 +32,10 @@ static void *split_cpu_thread_routine(void *arg)
> current_cpu = cpu;
>
> /* TODO: init_vcpu_thread() */
> - /* TODO: allocate AccelCPUState */
> + cpu->accel = g_renew(AccelCPUState, cpu->accel, 1); /* XXX only with current TCG */
> + acs = cpu->accel;
> + acs->accel = as;
> + acs->use_hw = false;
>
> /* signal CPU creation */
> cpu_thread_signal_created(cpu);
> @@ -60,6 +66,7 @@ static void *split_cpu_thread_routine(void *arg)
> */
> break;
> case EXCP_ATOMIC:
> + assert(!acs->use_hw);
> bql_unlock();
> cpu_exec_step_atomic(cpu);
> bql_lock();
next prev parent reply other threads:[~2025-06-22 2:36 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-20 17:27 [RFC PATCH RESEND 00/42] accel/split/arm: Run EL2 using TCG and EL1/EL0 in hardware with HVF Philippe Mathieu-Daudé
2025-06-20 17:27 ` [RFC PATCH RESEND 01/42] accel/split: Minimal stubs for split accelerator Philippe Mathieu-Daudé
2025-06-22 2:18 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 02/42] accel/split: Define SplitAccelState Philippe Mathieu-Daudé
2025-06-22 2:19 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 03/42] accel/split: Implement cpus_are_resettable() Philippe Mathieu-Daudé
2025-06-22 2:20 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 04/42] accel/split: Implement accel_init_machine() Philippe Mathieu-Daudé
2025-06-22 2:22 ` Richard Henderson
2025-06-22 2:23 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 05/42] accel/split: Expose 'hw' and 'sw' properties Philippe Mathieu-Daudé
2025-06-22 2:26 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 06/42] accel/split: Empty setup_post() Philippe Mathieu-Daudé
2025-06-22 2:26 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 07/42] accel/split: Implement supports_guest_debug() Philippe Mathieu-Daudé
2025-06-22 2:28 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 08/42] accel/split: Implement gdbstub_supported_sstep_flags() Philippe Mathieu-Daudé
2025-06-22 2:30 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 09/42] accel/split: Add cpu_thread_routine() stub Philippe Mathieu-Daudé
2025-06-22 2:32 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 10/42] accel/split: Define and allocate AccelCPUState Philippe Mathieu-Daudé
2025-06-22 2:35 ` Richard Henderson [this message]
2025-06-20 17:27 ` [RFC PATCH RESEND 11/42] accel/split: Register MTTCG Philippe Mathieu-Daudé
2025-06-22 2:38 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 12/42] accel/split: Have thread routine ready to dispatch over HW/SW Philippe Mathieu-Daudé
2025-06-22 2:45 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 13/42] accel/split: Implement cpu_reset_hold() Philippe Mathieu-Daudé
2025-06-22 2:46 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 14/42] accel/split: Implement synchronize_post_init() Philippe Mathieu-Daudé
2025-06-22 2:47 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 15/42] accel/split: Implement synchronize_pre_resume() Philippe Mathieu-Daudé
2025-06-22 2:47 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 16/42] accel/split: Implement synchronize_state() Philippe Mathieu-Daudé
2025-06-22 2:52 ` Richard Henderson
2025-06-22 2:54 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 17/42] accel/split: Implement synchronize_post_reset() Philippe Mathieu-Daudé
2025-06-20 17:27 ` [RFC PATCH RESEND 18/42] accel/split: Implement synchronize_pre_loadvm() Philippe Mathieu-Daudé
2025-06-20 17:27 ` [RFC PATCH RESEND 19/42] accel/split: Implement kick_vcpu_thread() Philippe Mathieu-Daudé
2025-06-22 2:56 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 20/42] accel/split: Implement cpu_common_realize() Philippe Mathieu-Daudé
2025-06-22 2:56 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 21/42] accel/split: Set use_hw in cpu_thread_routine() and switch over Philippe Mathieu-Daudé
2025-06-22 3:02 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 22/42] accel/split: Add few trace events in cpu_thread_routine handler Philippe Mathieu-Daudé
2025-06-20 17:27 ` [RFC PATCH RESEND 23/42] target/arm: Implement SysemuCPUOps::can_accelerate() handler Philippe Mathieu-Daudé
2025-06-22 3:03 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 24/42] accel/split: Implement handle_interrupt() Philippe Mathieu-Daudé
2025-06-22 3:04 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 25/42] accel/split: Empty ops_init() Philippe Mathieu-Daudé
2025-06-22 3:09 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 26/42] accel/split: Empty set/get_virtual_clock() Philippe Mathieu-Daudé
2025-06-22 3:11 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 27/42] accel/split: Empty get_elapsed_ticks() Philippe Mathieu-Daudé
2025-06-22 3:12 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 28/42] accel/split: Empty cpu_thread_is_idle() Philippe Mathieu-Daudé
2025-06-22 3:14 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 29/42] accel/split: Kludge qemu_tcg_mttcg_enabled() Philippe Mathieu-Daudé
2025-06-20 17:27 ` [RFC PATCH RESEND 30/42] accel/split: Implement remove_all_breakpoints() Philippe Mathieu-Daudé
2025-06-22 3:17 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 31/42] accel/split: Implement remove_breakpoint() Philippe Mathieu-Daudé
2025-06-22 3:17 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 32/42] accel/split: Implement insert_breakpoint() Philippe Mathieu-Daudé
2025-06-22 3:17 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 33/42] accel/split: Implement update_guest_debug() Philippe Mathieu-Daudé
2025-06-22 3:18 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 34/42] accel/split: Implement get_[vcpu]_stats() Philippe Mathieu-Daudé
2025-06-22 3:19 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 35/42] target/arm: Emulate EL2 under TCG Philippe Mathieu-Daudé
2025-06-22 3:20 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 36/42] target/arm: Have ERET switch to hw accel for EL0/EL1 Philippe Mathieu-Daudé
2025-06-22 3:27 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 37/42] accel/hvf: Emulate HVC at EL2 Philippe Mathieu-Daudé
2025-06-22 3:28 ` Richard Henderson
2025-07-18 5:47 ` Philippe Mathieu-Daudé
2025-06-20 17:27 ` [RFC PATCH RESEND 38/42] accel/tcg: Introduce TCGCPUOps::rebuild_tb_hflags handler Philippe Mathieu-Daudé
2025-06-22 3:33 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 39/42] target/arm: Implement TCGCPUOps::rebuild_tb_hflags() Philippe Mathieu-Daudé
2025-06-20 17:27 ` [RFC PATCH RESEND 40/42] accel/split: Call TCGCPUOps::rebuild_tb_hflags() Philippe Mathieu-Daudé
2025-06-22 3:34 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 41/42] tests/functional: Add split_available() helper Philippe Mathieu-Daudé
2025-06-22 3:36 ` Richard Henderson
2025-06-20 17:27 ` [RFC PATCH RESEND 42/42] tests/functional: Test Aarch64 virt machine with split-accelerator Philippe Mathieu-Daudé
2025-09-02 13:49 ` [RFC PATCH RESEND 00/42] accel/split/arm: Run EL2 using TCG and EL1/EL0 in hardware with HVF Philippe Mathieu-Daudé
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