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References: <20181005211450.847-1-cota@braap.org>
	<20181005211450.847-5-cota@braap.org>
From: Richard Henderson <richard.henderson@linaro.org>
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Date: Mon, 15 Oct 2018 19:52:34 -0700
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Subject: Re: [Qemu-devel] [PATCH v3 4/4] cputlb: read CPUTLBEntry.addr_write
 atomically
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To: "Emilio G. Cota" <cota@braap.org>, qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>, =?UTF-8?Q?Alex_Benn=c3=a9e?= <alex.bennee@linaro.org>

On 10/5/18 2:14 PM, Emilio G. Cota wrote:
> -    target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
> +    target_ulong tlb_addr =
> +        atomic_read(&env->tlb_table[mmu_idx][index].addr_write);

This fails for 32-bit hosts emulating 64-bit hosts.
I think you need a separate helper function.  Perhaps

static inline target_ulong tlb_addr_write(CPUTLBEntry *ent)
{
#if TCG_OVERSIZED_GUEST
    return ent->addr_write;
#else
    return atomic_read(&ent->addr_write);
#endif
}

I'm going to drop this patch from my queue for now.
We can fix it up this week some time.


r~