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From: Laszlo Ersek <lersek@redhat.com>
To: Gleb Natapov <gleb@redhat.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] reset PMBA and PMREGMISC PIIX4 registers.
Date: Tue, 07 Aug 2012 15:03:14 +0200	[thread overview]
Message-ID: <50211212.5020909@redhat.com> (raw)
In-Reply-To: <20120807125203.GC3341@redhat.com>

On 08/07/12 14:52, Gleb Natapov wrote:
> The bug causes Windows + OVMF hang after reboot since OVMF
> checks PMREGMISC to see if IO space is enabled and skip
> configuration if it is. 
> 
> Signed-off-by: Gleb Natapov <gleb@redhat.com>
> diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
> index 0aace60..90b46b5 100644
> --- a/hw/acpi_piix4.c
> +++ b/hw/acpi_piix4.c
> @@ -353,6 +353,9 @@ static void piix4_reset(void *opaque)
>      pci_conf[0x5a] = 0;
>      pci_conf[0x5b] = 0;
>  
> +    pci_conf[0x40] = 0x01; /* PM io base read only bit */
> +    pci_conf[0x80] = 0;
> +
>      if (s->kvm_enabled) {
>          /* Mark SMM as already inited (until KVM supports SMM). */
>          pci_conf[0x5B] = 0x02;
> @@ -392,8 +395,6 @@ static int piix4_pm_initfn(PCIDevice *dev)
>      pci_conf[0x09] = 0x00;
>      pci_conf[0x3d] = 0x01; // interrupt pin 1
>  
> -    pci_conf[0x40] = 0x01; /* PM io base read only bit */
> -
>      /* APM */
>      apm_init(&s->apm, apm_ctrl_changed, s);
>  
> --
> 			Gleb.

Unless I'm missing something, the patch keeps the "PM io base read only
bit" set-up correctly the first time around too, since

piix4_pm_initfn()
  qemu_register_reset(piix4_reset, ...);

main()
  qemu_system_reset()

FWIW,

Reviewed-by: Laszlo Ersek <lersek@redhat.com>

Thanks!
Laszlo

  reply	other threads:[~2012-08-07 13:02 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-08-07 12:52 [Qemu-devel] [PATCH] reset PMBA and PMREGMISC PIIX4 registers Gleb Natapov
2012-08-07 13:03 ` Laszlo Ersek [this message]
2012-08-15 16:48 ` Gleb Natapov

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