From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:40475) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T0zzo-0004wr-Di for qemu-devel@nongnu.org; Mon, 13 Aug 2012 15:08:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1T0zzm-0000XC-1Z for qemu-devel@nongnu.org; Mon, 13 Aug 2012 15:08:12 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41284) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T0zzl-0000X6-PO for qemu-devel@nongnu.org; Mon, 13 Aug 2012 15:08:09 -0400 Message-ID: <50295095.7070906@redhat.com> Date: Mon, 13 Aug 2012 21:08:05 +0200 From: Igor Mammedov MIME-Version: 1.0 References: <1344369413-9053-1-git-send-email-ehabkost@redhat.com> <1344369413-9053-3-git-send-email-ehabkost@redhat.com> In-Reply-To: <1344369413-9053-3-git-send-email-ehabkost@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC 02/15] hw/apic.c: rename bit functions to not conflict with bitops.h (v2) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: qemu-devel@nongnu.org, Gleb Natapov , =?ISO-8859-1?Q?Andreas_F=E4rber?= On 08/07/2012 09:56 PM, Eduardo Habkost wrote: > Changes v1 -> v2: > - Coding style change: break too-long line > > Signed-off-by: Eduardo Habkost > --- > hw/apic.c | 35 ++++++++++++++++++----------------- > 1 file changed, 18 insertions(+), 17 deletions(-) > > diff --git a/hw/apic.c b/hw/apic.c > index 385555e..e1f633a 100644 > --- a/hw/apic.c > +++ b/hw/apic.c > @@ -51,7 +51,7 @@ static int ffs_bit(uint32_t value) > return ctz32(value); > } > > -static inline void set_bit(uint32_t *tab, int index) > +static inline void apic_set_bit(uint32_t *tab, int index) > { > int i, mask; > i = index >> 5; > @@ -59,7 +59,7 @@ static inline void set_bit(uint32_t *tab, int index) > tab[i] |= mask; > } > > -static inline void reset_bit(uint32_t *tab, int index) > +static inline void apic_reset_bit(uint32_t *tab, int index) > { > int i, mask; > i = index >> 5; > @@ -67,7 +67,7 @@ static inline void reset_bit(uint32_t *tab, int index) > tab[i] &= ~mask; > } > > -static inline int get_bit(uint32_t *tab, int index) > +static inline int apic_get_bit(uint32_t *tab, int index) > { > int i, mask; > i = index >> 5; > @@ -184,7 +184,7 @@ void apic_deliver_pic_intr(DeviceState *d, int level) > case APIC_DM_FIXED: > if (!(lvt & APIC_LVT_LEVEL_TRIGGER)) > break; > - reset_bit(s->irr, lvt & 0xff); > + apic_reset_bit(s->irr, lvt & 0xff); > /* fall through */ > case APIC_DM_EXTINT: > cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); > @@ -379,13 +379,13 @@ void apic_poll_irq(DeviceState *d) > > static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode) > { > - apic_report_irq_delivered(!get_bit(s->irr, vector_num)); > + apic_report_irq_delivered(!apic_get_bit(s->irr, vector_num)); > > - set_bit(s->irr, vector_num); > + apic_set_bit(s->irr, vector_num); > if (trigger_mode) > - set_bit(s->tmr, vector_num); > + apic_set_bit(s->tmr, vector_num); > else > - reset_bit(s->tmr, vector_num); > + apic_reset_bit(s->tmr, vector_num); > if (s->vapic_paddr) { > apic_sync_vapic(s, SYNC_ISR_IRR_TO_VAPIC); > /* > @@ -405,8 +405,9 @@ static void apic_eoi(APICCommonState *s) > isrv = get_highest_priority_int(s->isr); > if (isrv < 0) > return; > - reset_bit(s->isr, isrv); > - if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && get_bit(s->tmr, isrv)) { > + apic_reset_bit(s->isr, isrv); > + if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && > + apic_get_bit(s->tmr, isrv)) { > ioapic_eoi_broadcast(isrv); > } > apic_sync_vapic(s, SYNC_FROM_VAPIC | SYNC_TO_VAPIC); > @@ -445,7 +446,7 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, > int idx = apic_find_dest(dest); > memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t)); > if (idx >= 0) > - set_bit(deliver_bitmask, idx); > + apic_set_bit(deliver_bitmask, idx); > } > } else { > /* XXX: cluster mode */ > @@ -455,11 +456,11 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, > if (apic_iter) { > if (apic_iter->dest_mode == 0xf) { > if (dest & apic_iter->log_dest) > - set_bit(deliver_bitmask, i); > + apic_set_bit(deliver_bitmask, i); > } else if (apic_iter->dest_mode == 0x0) { > if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) && > (dest & apic_iter->log_dest & 0x0f)) { > - set_bit(deliver_bitmask, i); > + apic_set_bit(deliver_bitmask, i); > } > } > } else { > @@ -502,14 +503,14 @@ static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, > break; > case 1: > memset(deliver_bitmask, 0x00, sizeof(deliver_bitmask)); > - set_bit(deliver_bitmask, s->idx); > + apic_set_bit(deliver_bitmask, s->idx); > break; > case 2: > memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask)); > break; > case 3: > memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask)); > - reset_bit(deliver_bitmask, s->idx); > + apic_reset_bit(deliver_bitmask, s->idx); > break; > } > > @@ -566,8 +567,8 @@ int apic_get_interrupt(DeviceState *d) > apic_sync_vapic(s, SYNC_TO_VAPIC); > return s->spurious_vec & 0xff; > } > - reset_bit(s->irr, intno); > - set_bit(s->isr, intno); > + apic_reset_bit(s->irr, intno); > + apic_set_bit(s->isr, intno); > apic_sync_vapic(s, SYNC_TO_VAPIC); > > /* re-inject if there is still a pending PIC interrupt */ > Looks good to me. -- Regards, Igor