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Date: Fri, 24 Aug 2012 20:20:44 +0200
From: =?ISO-8859-1?Q?Andreas_F=E4rber?= <afaerber@suse.de>
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Subject: Re: [Qemu-devel] [PATCH 2/5] softmmu templates: optionally pass
 CPUState to memory access functions
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To: malc <av1474@comtv.ru>
Cc: Blue Swirl <blauwirbel@gmail.com>, qemu-devel <qemu-devel@nongnu.org>, Aurelien Jarno <aurelien@aurel32.net>, Alexander Graf <agraf@suse.de>

Am 24.08.2012 18:26, schrieb malc:
> On Fri, 24 Aug 2012, Andreas F?rber wrote:
>=20
>> Am 24.08.2012 17:35, schrieb malc:
>>> On Fri, 24 Aug 2012, malc wrote:
>>>
>>>> On Fri, 24 Aug 2012, Aurelien Jarno wrote:
>>>>
>>>>> On Sun, Mar 11, 2012 at 10:24:03PM +0000, Blue Swirl wrote:
>>>
>>> [..snip..]
>>>
>>>>> - On 32 bit hosts, which usually need register alignments for 64-bi=
t
>>>>>   values (at least on arm and mips), given AREG0 is a 32-bit value =
this
>>>>             ditto ppc32, erm.. with sysv abi that is
>>
>> ...which have been fixed in the v1.1 release cycle. You can take a loo=
k
>> at tcg/ppc/ for how we've fixed that with alignment macros and variabl=
e.
>=20
> You are replying to the wrong person methinks.

No, I replied to Aur=E9lien just like you did. You don't need to look at
the code you already reviewed. :)

Andreas

--=20
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