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From: "Andreas Färber" <afaerber@suse.de>
To: Aurelien Jarno <aurelien@aurel32.net>,
	Peter Maydell <peter.maydell@linaro.org>
Cc: Blue Swirl <blauwirbel@gmail.com>,
	qemu-devel <qemu-devel@nongnu.org>,
	Alexander Graf <agraf@suse.de>
Subject: Re: [Qemu-devel] [PATCH 2/5] softmmu templates: optionally pass CPUState to memory access functions
Date: Fri, 24 Aug 2012 20:43:32 +0200	[thread overview]
Message-ID: <5037CB54.9030800@suse.de> (raw)
In-Reply-To: <20120824180557.GJ3553@ohm.aurel32.net>

Am 24.08.2012 20:05, schrieb Aurelien Jarno:
> On Fri, Aug 24, 2012 at 05:52:29PM +0200, Andreas Färber wrote:
>> Not opposed to changing the argument order, but given that we're inches
>> away from v1.2 (in Hard Freeze), it might be better to first get AREG0
>> as first argument working for your favorite hosts as a bugfix and then
>> do any larger optimization for v1.3.
> 
> It's what I tried to do first, but I don't think it is realistic to use
> such a code for v1.2, it is complex to support all cases, and thus
> likely full of bugs. Maybe we should simply disable ARM and MIPS support
> for this release.

Depends on what you mean with "disable"? Adding an #error would hurt our
arm build just like earlier the ppc build, and I would hope from my last
testing that the problems would only affect the AREG0 targets,
especially not ARM on ARM (or MIPS on MIPS).

Aborting at runtime, only when really unsupported, would seem better.

I had taken a look at tcg/arm/ shortly after having fixed ppc (seeing
that there was a similar TODO or FIXME) but got distracted by other
projects. And your remarks wrt stack sound a bit frightening now. ;)
@Peter, have you looked into tcg/arm/ AREG0 support?

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

  reply	other threads:[~2012-08-24 18:43 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-11 22:24 [Qemu-devel] [PATCH 2/5] softmmu templates: optionally pass CPUState to memory access functions Blue Swirl
2012-08-24 15:05 ` Aurelien Jarno
2012-08-24 15:33   ` malc
2012-08-24 15:35     ` malc
2012-08-24 15:52       ` Andreas Färber
2012-08-24 16:26         ` malc
2012-08-24 18:20           ` Andreas Färber
2012-08-24 18:05         ` Aurelien Jarno
2012-08-24 18:43           ` Andreas Färber [this message]
2012-08-24 18:53             ` Aurelien Jarno
2012-08-25  9:18               ` Blue Swirl
2012-08-25 12:56                 ` Aurelien Jarno
2012-08-24 23:01             ` Peter Maydell
2012-08-25  9:52               ` Blue Swirl
2012-09-20 11:46                 ` Alexander Graf
2012-08-25 12:53               ` Aurelien Jarno
2012-08-25 23:28             ` Peter Maydell
2012-08-26  1:03               ` Peter Maydell
2012-08-25  9:05   ` Blue Swirl

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