From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59824) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T6g3b-0003Qb-LU for qemu-devel@nongnu.org; Wed, 29 Aug 2012 07:03:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1T6g3W-0006oV-3y for qemu-devel@nongnu.org; Wed, 29 Aug 2012 07:03:35 -0400 Received: from smtp6-g21.free.fr ([212.27.42.6]:40424) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T6g3V-0006oL-IL for qemu-devel@nongnu.org; Wed, 29 Aug 2012 07:03:30 -0400 Message-ID: <503DF6F9.8090007@free.fr> Date: Wed, 29 Aug 2012 13:03:21 +0200 From: =?UTF-8?B?RnJhbsOnb2lzIFJldm9s?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH] [RFC] PPC: dump DCRs from monitor List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel Developers Cc: Alexander Graf Hi, I noticed the DCRs weren't shown with the registers or another command, and tried to add one to dump them to help debugging my sam460ex target. This first version doesn't list the names since they aren't registered as such. I tried adding a name arg to ppc_dcr_register, and a #define to get it from the index, but it seems some code uses a loop to register them, so it gives a dump like: DCR[SDRAM0_CFGDATA 11] 00000000 DCR[dcr_base + i c0] 00000000 DCR[dcr_base + i c1] 00000000 Any suggestion? BTW, they aren't saved in state dumps, are they? Fran=C3=A7ois. diff --git a/cpu-all.h b/cpu-all.h index 5e07d28..a34ae25 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -372,6 +372,8 @@ void cpu_dump_state(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf, int flags); void cpu_dump_statistics(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf, int flags); +void ppc_dump_dcr(CPUArchState *env, FILE *f, fprintf_function cpu_fprin= tf, + int flags); void QEMU_NORETURN cpu_abort(CPUArchState *env, const char *fmt, ...) GCC_FMT_ATTR(2, 3); diff --git a/hw/ppc.c b/hw/ppc.c index 98546de..74b82b7 100644 --- a/hw/ppc.c +++ b/hw/ppc.c @@ -1120,6 +1120,27 @@ int ppc_dcr_init (CPUPPCState *env, int (*read_error)(int dcrn), return 0; } +void ppc_dump_dcr (CPUPPCState *env, FILE*f, fprintf_function cpu_fprint= f, + int flags) +{ + ppc_dcr_t *dcr_env; + ppc_dcrn_t *dcr; + int dcrn; + + dcr_env =3D env->dcr_env; + if (dcr_env =3D=3D NULL) + return; + + for (dcrn =3D 0; dcrn < DCRN_NB; dcrn++) { + dcr =3D &dcr_env->dcrn[dcrn]; + if (dcr->dcr_read =3D=3D NULL) + continue; + + cpu_fprintf(f, "DCR[%02x] %08x\n", dcrn, + dcr->dcr_read(dcr->opaque, dcrn)); + } +} + /***********************************************************************= ******/ /* Debug port */ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val) diff --git a/monitor.c b/monitor.c index b17b1bb..b7a2a4b 100644 --- a/monitor.c +++ b/monitor.c @@ -936,6 +936,14 @@ static void do_info_cpu_stats(Monitor *mon) env =3D mon_get_cpu(); cpu_dump_statistics(env, (FILE *)mon, &monitor_fprintf, 0); } + +static void do_info_dcr(Monitor *mon) +{ + CPUArchState *env; + + env =3D mon_get_cpu(); + ppc_dump_dcr(env, (FILE*)mon, (fprintf_function)monitor_printf, 0); +} #endif static void do_trace_print_events(Monitor *mon) @@ -2768,6 +2776,15 @@ static mon_cmd_t info_cmds[] =3D { .mhandler.info =3D tlb_info, }, #endif +#if defined(TARGET_PPC) + { + .name =3D "dcr", + .args_type =3D "", + .params =3D "", + .help =3D "show device control registers", + .mhandler.info =3D do_info_dcr, + }, +#endif #if defined(TARGET_I386) { .name =3D "mem",