From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:47732) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAzzw-0000GZ-Sm for qemu-devel@nongnu.org; Mon, 10 Sep 2012 05:09:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TAzzu-0003lh-6f for qemu-devel@nongnu.org; Mon, 10 Sep 2012 05:09:40 -0400 Received: from mout.web.de ([212.227.15.3]:51706) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TAzzt-0003lS-TJ for qemu-devel@nongnu.org; Mon, 10 Sep 2012 05:09:38 -0400 Message-ID: <504DAE47.8090607@web.de> Date: Mon, 10 Sep 2012 11:09:27 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <1347240466-6152-1-git-send-email-mmogilvi_qemu@miniinfo.net> <1347240466-6152-6-git-send-email-mmogilvi_qemu@miniinfo.net> <504DAB38.4000407@redhat.com> In-Reply-To: <504DAB38.4000407@redhat.com> Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="------------enigCF95CA55D053C81E199753D8" Subject: Re: [Qemu-devel] [PATCH v5 5/6] i8259: fix so that dropping IRQ level always clears the interrupt request List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Paolo Bonzini , Matthew Ogilvie , "Maciej W. Rozycki" , qemu-devel@nongnu.org This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --------------enigCF95CA55D053C81E199753D8 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable On 2012-09-10 10:56, Avi Kivity wrote: > On 09/10/2012 04:27 AM, Matthew Ogilvie wrote: >> Intel's definition of "edge triggered" means: "asserted with a >> low-to-high transition at the time an interrupt is registered and >> then kept high until the interrupt is served via one of the >> EOI mechanisms or goes away unhandled." >> >> So the only difference between edge triggered and level triggered >> is in the leading edge, with no difference in the trailing edge. >=20 > Hard to believe. So an edge while cpu interrupts are disabled is ignor= ed? No, this is about the PIC, not the CPU interrupt inputs. Matthew, did you verify this on real hardware by reading back the IRR as I suggested? Jan --------------enigCF95CA55D053C81E199753D8 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://www.enigmail.net/ iEYEARECAAYFAlBNrkcACgkQitSsb3rl5xS5TQCg0CuU2Cglms8rn4AVOHlALgRZ BqwAoMvKjgB0Sr2teDX51bfHFRNV9LCr =2pP0 -----END PGP SIGNATURE----- --------------enigCF95CA55D053C81E199753D8--