From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45354) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TB1KS-00041k-9o for qemu-devel@nongnu.org; Mon, 10 Sep 2012 06:34:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TB1KM-0005co-KN for qemu-devel@nongnu.org; Mon, 10 Sep 2012 06:34:56 -0400 Received: from smtp02.citrix.com ([66.165.176.63]:10964) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TB1KM-0005cj-FD for qemu-devel@nongnu.org; Mon, 10 Sep 2012 06:34:50 -0400 Message-ID: <504DC2DF.5030705@citrix.com> Date: Mon, 10 Sep 2012 11:37:19 +0100 From: Julien Grall MIME-Version: 1.0 References: <767c2d0e1f86cd99872eb51f9545eebc7f27411e.1346770982.git.julien.grall@citrix.com> <504CA638.1030800@redhat.com> In-Reply-To: <504CA638.1030800@redhat.com> Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH V9 4/8] hw/acpi_piix4.c: replace register_ioport* List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: "jan.kiszka@siemens.com" , Stefano Stabellini , "qemu-devel@nongnu.org" , "afaerber@suse.de" , "kraxel@redhat.com" On 09/09/2012 03:22 PM, Avi Kivity wrote: > On 09/04/2012 06:13 PM, Julien Grall wrote: > >> This patch replaces all register_ioport* with the new memory API. It permits >> to use the new Memory stuff like listener. >> >> > >> @@ -200,8 +212,11 @@ static void pm_io_space_update(PIIX4PMState *s) >> >> /* XXX: need to improve memory and ioport allocation */ >> PIIX4_DPRINTF("PM: mapping to 0x%x\n", pm_io_base); >> - iorange_init(&s->ioport,&pm_iorange_ops, pm_io_base, 64); >> - ioport_register(&s->ioport); >> + >> + memory_region_set_address(&s->pm_io, pm_io_base); >> + memory_region_set_enabled(&s->pm_io, true); >> + } else { >> + memory_region_set_enabled(&s->pm_io, false); >> } >> } >> >> > The entire if () can be simplified to > > pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40)); > pm_io_base&= 0xffc0; > memory_region_transaction_begin() > memory_region_set_enabled(&s->pm_io, s->dev.config[0x80]& 1); > memory_region_set_address(&s->pm_io, pm_io_base); > memory_region_transaction_commit(); > I will modify, do I need to resend all the patch series or just this patch ? -- Julien Grall