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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/9] NiosII: Add support for the Altera NiosII soft-core CPU.
Date: Tue, 11 Sep 2012 16:18:30 -0700	[thread overview]
Message-ID: <504FC6C6.6050704@twiddle.net> (raw)
In-Reply-To: <20120911213443.GA6791@ohm.aurel32.net>

Somehow the original patch set never arrived here.  Replying indirectly...

> On Sun, Sep 09, 2012 at 08:19:59PM -0400, crwulff@gmail.com wrote:
>> diff --git a/target-nios2/exec.h b/target-nios2/exec.h
...
>> +static inline int cpu_has_work(CPUState *env)
>> +{
>> +    return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
>> +}
>> +
>> +static inline int cpu_halted(CPUState *env)
>> +{
>> +    if (!env->halted) {
>> +        return 0;
>> +    }
>> +
>> +    if (cpu_has_work(env)) {
>> +        env->halted = 0;
>> +        return 0;
>> +    }
>> +
>> +    return EXCP_HALTED;
>> +}
>> +
>> +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
>> +{
>> +    env->regs[R_PC] = tb->pc;
>> +}

Do my eyes deceive me or do you have duplicates of these from cpu.h?

>> +++ b/target-nios2/instruction.c

Any particular reason you split this file out from translate.c?

>> +static void __break(DisasContext *dc, uint32_t code __attribute__((unused)))

Leading un is reserved to the compiler.  break1?  break_?

>> +/* I-Type instruction */
>> +struct i_type {
>> +    uint32_t op:6;
>> +    uint32_t imm16:16;
>> +    uint32_t b:5;
>> +    uint32_t a:5;
>> +} __attribute__((packed));
>> +
>> +union i_type_u {
>> +    uint32_t      v;
>> +    struct i_type i;
>> +};
>> +
>> +#define I_TYPE(instr, op) \
>> +    union i_type_u instr_u = { .v = op }; \
>> +    struct i_type *instr = &instr_u.i

This is an extremely unportable idea.

Bit field layout differs from big-endian to little-endian, and between
compiler abis.  The only reliable method of picking out a specific set
of bits is to shift and mask by hand.

Which you can still do with your I_TYPE/R_TYPE macros (which I do like),
but instead with different structure definitions and initialization.

>> +typedef struct DisasContext {
>> +    CPUNios2State           *env;
>> +    TCGv                    *cpu_R;
>> +    int                      is_jmp;
>> +    target_ulong             pc;
>> +    struct TranslationBlock *tb;
>> +} DisasContext;

Why are you copying cpu_R here, and using s->cpu_R everywhere?
Why not directly use the global variable cpu_R like everyone else?
I suppose it's related to translate.c vs instruction.c, but I've
already expressed an opinion there...

>> +/* Indirect stringification.  Doing two levels allows the parameter to be a
>> + * macro itself.  For example, compile with -DFOO=bar, __stringify(FOO)
>> + * converts to "bar".
>> + */

Is there any reason you'd want to do that for the instruction tables?

>> +#define __stringify_1(x...)     #x
>> +#define __stringify(x...)       __stringify_1(x)

... because there's that leading underscore again, and honestly you don't need
anything but

#define INSTRUCTION(N)  { #N, N }

>> +#include "dyngen-exec.h"

This is going away.

>> +void helper_memalign(uint32_t addr, uint32_t dr, uint32_t wr, uint32_t mask)
>> +{
>> +    if (addr & mask) {
>> +        qemu_log("unaligned access addr=%x mask=%x, wr=%d dr=r%d\n",
>> +                 addr, mask, wr, dr);
>> +        env->regs[CR_BADADDR] = addr;
>> +        env->regs[CR_EXCEPTION] = EXCP_UNALIGN << 2;
>> +        helper_raise_exception(EXCP_UNALIGN);
>> +    }
>> +}

This should be done with 

#define ALIGNED_ONLY

directly in the softmmu_template.h helpers.  C.f. target-sparc/ldst_helper.c.

>> +uint32_t helper_divs(uint32_t a, uint32_t b)
>> +{
>> +    return (int32_t)a / (int32_t)b;
>> +}
>> +
>> +uint32_t helper_divu(uint32_t a, uint32_t b)
>> +{
>> +    return a / b;
>> +}

(1) Missing divide by zero check.  This will generally put qemu into a loop.

(2) You could (and probably should) use tcg_gen_div{,u}_tl.
    I would only suggest external helper functions if you have to check for
    additional exceptions apart from X / 0, like -INT_MIN / -1.

>> +    /* Dump the CPU state to the log */
>> +    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
>> +        qemu_log("--------------\n");
>> +        log_cpu_state(env, 0);
>> +    }

Don't log cpu state for in_asm.  That's a common bug across translators,
and all it does is cause double logging for "-d cpu,in_asm".

>> +        LOG_DIS("%8.8x:\t", dc->pc);

Use tcg_gen_debug_insn_start, which makes the tcg opcodes dumps pretty too.


r~

  parent reply	other threads:[~2012-09-11 23:18 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <Nios2-Resend2>
2012-09-10  0:19 ` [Qemu-devel] [PATCH 0/9] Altera NiosII support crwulff
2012-09-10  0:19   ` [Qemu-devel] [PATCH 1/9] NiosII: Add support for the Altera NiosII soft-core CPU crwulff
2012-09-11 20:19     ` Blue Swirl
2012-09-14  3:30       ` Chris Wulff
2012-09-11 21:34     ` Aurelien Jarno
2012-09-11 22:30       ` Richard Henderson
2012-09-11 23:18       ` Richard Henderson [this message]
2012-09-14  3:42       ` Chris Wulff
2012-09-15 15:33       ` Chris Wulff
2012-09-15 14:55     ` Andreas Färber
2012-09-10  0:20   ` [Qemu-devel] [PATCH 2/9] NiosII: Disassembly of NiosII instructions ported from GDB crwulff
2012-09-11 19:58     ` Blue Swirl
2012-09-10  0:20   ` [Qemu-devel] [PATCH 3/9] Altera: Add support for Altera devices required to boot linux on NiosII crwulff
2012-09-11 19:53     ` Blue Swirl
2012-09-15 15:06       ` Andreas Färber
2012-09-10  0:20   ` [Qemu-devel] [PATCH 4/9] LabX: Support for some Lab X FPGA devices crwulff
2012-09-11 20:22     ` Blue Swirl
2012-09-10  0:20   ` [Qemu-devel] [PATCH 5/9] FDT: Add additional access methods for array types and walking children crwulff
2012-09-12  0:12     ` Peter Crosthwaite
2012-09-10  0:20   ` [Qemu-devel] [PATCH 6/9] NiosII: Build system and documentation integration crwulff
2012-09-10  0:20   ` [Qemu-devel] [PATCH 7/9] NiosII: Add a config that is dynamically set up by a device tree file crwulff
2012-09-11 19:40     ` Blue Swirl
2012-09-10  0:20   ` [Qemu-devel] [PATCH 8/9] MicroBlaze: " crwulff
2012-09-11 19:27     ` Blue Swirl
2012-09-12  0:17       ` Peter Crosthwaite
2012-09-14 19:13         ` Blue Swirl
2012-09-11 23:59     ` Peter Crosthwaite
2012-09-14  4:01       ` Chris Wulff
2012-09-10  0:20   ` [Qemu-devel] [PATCH 9/9] xilinx_timer: Fix a compile error if debug messages are enabled crwulff
2012-09-12  0:25     ` Peter Crosthwaite
2012-09-11 23:40   ` [Qemu-devel] [PATCH 0/9] Altera NiosII support Peter Crosthwaite
     [not found] <Nios2-Resend>
     [not found] ` <1347235683-10259-1-git-send-email-crwulff@gmail.com>
2012-09-10  0:07   ` [Qemu-devel] [PATCH 1/9] NiosII: Add support for the Altera NiosII soft-core CPU crwulff

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