From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:55956) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TC4Ln-0000OF-5u for qemu-devel@nongnu.org; Thu, 13 Sep 2012 04:00:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TC4Lh-0003BD-C3 for qemu-devel@nongnu.org; Thu, 13 Sep 2012 04:00:39 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32518) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TC4Lh-0003At-3G for qemu-devel@nongnu.org; Thu, 13 Sep 2012 04:00:33 -0400 Message-ID: <5051929A.2060407@redhat.com> Date: Thu, 13 Sep 2012 10:00:26 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <5048BA0F.3070300@redhat.com> <504DC9BC.1060407@dlhnet.de> <504DCF1A.1@redhat.com> <504DD483.6050104@dlhnet.de> <504DD9F5.2040300@redhat.com> <20120910122120.GA20907@redhat.com> <504DDD37.5000804@dlhnet.de> <504DDDDA.9040001@redhat.com> <505190E5.9080008@dlhnet.de> <5051915A.2050405@redhat.com> <20120913075734.GX20907@redhat.com> In-Reply-To: <20120913075734.GX20907@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] memtest 4.20+ does not work with -cpu host List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gleb Natapov Cc: "H. Peter Anvin" , Peter Lieven , Avi Kivity , "kvm@vger.kernel.org" , "qemu-devel@nongnu.org" Il 13/09/2012 09:57, Gleb Natapov ha scritto: >>> > > >>> > > #rdmsr -0 0x194 >>> > > 0000000000011100 >>> > > #rdmsr -0 0xce >>> > > 00000c0004011103 >> > >> > Yes, that can help implementing it in KVM. But without a spec to >> > understand what the bits actually mean, it's just as risky... >> > >> > Peter, do you have any idea where to get the spec of the memory >> > controller MSRs in Nehalem and newer processors? Apparently, memtest is >> > using them (and in particular 0x194) to find the speed of the FSB, or >> > something like that. >> > > Why would anyone will want to run memtest in a vm? May be just add those > MSRs to ignore list and that's it. >>From the output it looks like it's basically a list of bits. Returning something sensible is better, same as for the speed scaling MSRs. Paolo