From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:60968) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TC8Ak-00053m-TO for qemu-devel@nongnu.org; Thu, 13 Sep 2012 08:05:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TC8Af-0000TX-34 for qemu-devel@nongnu.org; Thu, 13 Sep 2012 08:05:30 -0400 Received: from ssl.dlhnet.de ([91.198.192.8]:43243 helo=ssl.dlh.net) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TC8Ae-0000S2-Se for qemu-devel@nongnu.org; Thu, 13 Sep 2012 08:05:25 -0400 Message-ID: <5051CC03.1030101@dlhnet.de> Date: Thu, 13 Sep 2012 14:05:23 +0200 From: Peter Lieven MIME-Version: 1.0 References: <504DCF1A.1@redhat.com> <504DD483.6050104@dlhnet.de> <504DD9F5.2040300@redhat.com> <20120910122120.GA20907@redhat.com> <504DDD37.5000804@dlhnet.de> <504DDDDA.9040001@redhat.com> <505190E5.9080008@dlhnet.de> <5051915A.2050405@redhat.com> <20120913075734.GX20907@redhat.com> <5051929A.2060407@redhat.com> <20120913080529.GY20907@redhat.com> In-Reply-To: <20120913080529.GY20907@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] memtest 4.20+ does not work with -cpu host List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gleb Natapov Cc: Paolo Bonzini , "H. Peter Anvin" , Avi Kivity , "kvm@vger.kernel.org" , "qemu-devel@nongnu.org" On 13.09.2012 10:05, Gleb Natapov wrote: > On Thu, Sep 13, 2012 at 10:00:26AM +0200, Paolo Bonzini wrote: >> Il 13/09/2012 09:57, Gleb Natapov ha scritto: >>>>>>> #rdmsr -0 0x194 >>>>>>> 0000000000011100 >>>>>>> #rdmsr -0 0xce >>>>>>> 00000c0004011103 >>>>> Yes, that can help implementing it in KVM. But without a spec to >>>>> understand what the bits actually mean, it's just as risky... >>>>> >>>>> Peter, do you have any idea where to get the spec of the memory >>>>> controller MSRs in Nehalem and newer processors? Apparently, memtest is >>>>> using them (and in particular 0x194) to find the speed of the FSB, or >>>>> something like that. >>>>> >>> Why would anyone will want to run memtest in a vm? May be just add those >>> MSRs to ignore list and that's it. >> >From the output it looks like it's basically a list of bits. Returning >> something sensible is better, same as for the speed scaling MSRs. >> > Everything is list of bits in computers :) At least 0xce is documented in SDM. > It cannot be implemented in a migration safe manner. What do you suggest just say memtest does not work? I am wondering why it is working with -cpu qemu64. Peter > > -- > Gleb.