From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:40225) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TEMY6-0000UF-4V for qemu-devel@nongnu.org; Wed, 19 Sep 2012 11:50:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TEMY4-0000Og-U3 for qemu-devel@nongnu.org; Wed, 19 Sep 2012 11:50:50 -0400 Received: from mail-bk0-f45.google.com ([209.85.214.45]:64647) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TEMY4-0000OS-IF for qemu-devel@nongnu.org; Wed, 19 Sep 2012 11:50:48 -0400 Received: by bkcjg9 with SMTP id jg9so432768bkc.4 for ; Wed, 19 Sep 2012 08:50:47 -0700 (PDT) Message-ID: <5059EA1E.6010200@gmail.com> Date: Wed, 19 Sep 2012 17:51:58 +0200 From: Francesco Lavra MIME-Version: 1.0 References: <5059E96C.6040203@gmail.com> In-Reply-To: <5059E96C.6040203@gmail.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH v2 1/2] Versatile Express: Fix NOR flash 0 address and remove flash alias List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , paul@codesourcery.com In the A series memory map (implemented in the Cortex A15 CoreTile), the first NOR flash bank (flash 0) is mapped to address 0x08000000, while address 0x00000000 can be configured as alias to either the first or the second flash bank. This patch fixes the definition of flash 0 address, and for simplicity removes the alias definition. Signed-off-by: Francesco Lavra --- hw/vexpress.c | 7 ++----- 1 files changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/vexpress.c b/hw/vexpress.c index b615844..454c2bb 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -62,7 +62,6 @@ enum { VE_COMPACTFLASH, VE_CLCD, VE_NORFLASH0, - VE_NORFLASH0ALIAS, VE_NORFLASH1, VE_SRAM, VE_VIDEORAM, @@ -104,9 +103,8 @@ static target_phys_addr_t motherboard_legacy_map[] = { }; static target_phys_addr_t motherboard_aseries_map[] = { - /* CS0: 0x00000000 .. 0x0c000000 */ - [VE_NORFLASH0] = 0x00000000, - [VE_NORFLASH0ALIAS] = 0x08000000, + /* CS0: 0x08000000 .. 0x0c000000 */ + [VE_NORFLASH0] = 0x08000000, /* CS4: 0x0c000000 .. 0x10000000 */ [VE_NORFLASH1] = 0x0c000000, /* CS5: 0x10000000 .. 0x14000000 */ @@ -413,7 +411,6 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard, sysbus_create_simple("pl111", map[VE_CLCD], pic[14]); /* VE_NORFLASH0: not modelled */ - /* VE_NORFLASH0ALIAS: not modelled */ /* VE_NORFLASH1: not modelled */ sram_size = 0x2000000; -- 1.7.5.4