From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58341) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TEqhI-00075e-8a for qemu-devel@nongnu.org; Thu, 20 Sep 2012 20:02:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TEqhG-0000cU-Vo for qemu-devel@nongnu.org; Thu, 20 Sep 2012 20:02:20 -0400 Sender: Richard Henderson Message-ID: <505BAE87.8040707@twiddle.net> Date: Thu, 20 Sep 2012 17:02:15 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1348181990-23415-1-git-send-email-jcmvbkbc@gmail.com> <1348181990-23415-2-git-send-email-jcmvbkbc@gmail.com> In-Reply-To: <1348181990-23415-2-git-send-email-jcmvbkbc@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 1/2] target-xtensa: fix extui shift amount List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Max Filippov Cc: Peter Maydell , qemu-devel@nongnu.org, Aurelien Jarno , qemu-stable On 09/20/2012 03:59 PM, Max Filippov wrote: > + if (shiftimm) { > + tcg_gen_shri_i32(tmp, cpu_R[RRR_T], shiftimm); > + } else { > + tcg_gen_mov_i32(tmp, cpu_R[RRR_T]); > + } tcg_gen_shri_i32 will perform this conditional already. > + switch (maskimm) { > + case 0xff: > + tcg_gen_ext8u_i32(cpu_R[RRR_R], tmp); > + break; > + > + case 0xffff: > + tcg_gen_ext16u_i32(cpu_R[RRR_R], tmp); > + break; And while this optimization happens eventually, we should change tcg-op.h to make sure it happens in tcg_gen_andi. r~