From: "Andreas Färber" <afaerber@suse.de>
To: Alexander Graf <agraf@suse.de>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Riku Voipio <riku.voipio@iki.fi>,
"qemu-ppc@nongnu.org List" <qemu-ppc@nongnu.org>,
qemu-devel qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 1/2] linux-user: ppc: mark as long long aligned
Date: Mon, 01 Oct 2012 15:04:15 +0200 [thread overview]
Message-ID: <506994CF.4070609@suse.de> (raw)
In-Reply-To: <1348968759-10913-1-git-send-email-agraf@suse.de>
Am 30.09.2012 03:32, schrieb Alexander Graf:
> The PPC32 ABI dictates that long long (64bit) parameters are pass in odd/even
> register pairs. Because unlike ARM and MIPS we start at an odd register number,
> we can reuse the same aligning code that ARM and MIPS use.
>
> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
> linux-user/syscall.c | 6 +++++-
> 1 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index 1a38169..8cd56f2 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -587,12 +587,16 @@ extern int setfsgid(int);
> extern int setgroups(int, gid_t *);
>
> /* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
> -#ifdef TARGET_ARM
> +#ifdef TARGET_ARM
For anyone wondering, this is dropping a whitespace at end of line. ;)
> static inline int regpairs_aligned(void *cpu_env) {
> return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
> }
> #elif defined(TARGET_MIPS)
> static inline int regpairs_aligned(void *cpu_env) { return 1; }
> +#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
> +/* PPC32 expects 64bit parameters to be passed on odd/even pairs of registers
> + which translates to the same as ARM/MIPS, because we start with r3 as arg1 */
> +static inline int regpairs_aligned(void *cpu_env) { return 1; }
> #else
> static inline int regpairs_aligned(void *cpu_env) { return 0; }
> #endif
It is obvious that this function has been copied unmodified from mips,
but shouldn't new code use bool and true, assuming that there is no
magic performed on the return value? :)
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2012-10-01 13:04 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-30 1:32 [Qemu-devel] [PATCH 1/2] linux-user: ppc: mark as long long aligned Alexander Graf
2012-09-30 1:32 ` [Qemu-devel] [PATCH 2/2] linux-user: register align p{read, write}64 Alexander Graf
2012-10-01 17:31 ` Alex Barcelo
2012-10-12 11:42 ` Peter Maydell
2012-10-01 13:04 ` Andreas Färber [this message]
2012-10-01 13:10 ` [Qemu-devel] [PATCH 1/2] linux-user: ppc: mark as long long aligned Alexander Graf
2012-10-01 17:27 ` malc
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