From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:38333) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJQ5p-0006V4-0v for qemu-devel@nongnu.org; Wed, 03 Oct 2012 10:38:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TJQ5h-0000Uh-8d for qemu-devel@nongnu.org; Wed, 03 Oct 2012 10:38:32 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:39719) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJQ5h-0000Cn-1j for qemu-devel@nongnu.org; Wed, 03 Oct 2012 10:38:25 -0400 Received: by mail-pb0-f45.google.com with SMTP id rp2so10061642pbb.4 for ; Wed, 03 Oct 2012 07:38:24 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <506C4DD2.5060206@redhat.com> Date: Wed, 03 Oct 2012 16:38:10 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1349270954-4657-1-git-send-email-ehabkost@redhat.com> <1349270954-4657-2-git-send-email-ehabkost@redhat.com> In-Reply-To: <1349270954-4657-2-git-send-email-ehabkost@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC 01/18] pc: create "PC" device class List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: Igor Mammedov , qemu-devel@nongnu.org, Gleb Natapov , =?ISO-8859-1?Q?Andreas_F=E4rber?= Il 03/10/2012 15:28, Eduardo Habkost ha scritto: > We can make it a child of a generic "machine" class later, but right now > a "PC" class is needed to allow global-properties to control some > details of CPU creation on the PC code. Does it need to be a Device, or can it be a normal Object (or for clarity a derivative of TYPE_CONTAINER)? Paolo > Signed-off-by: Eduardo Habkost > --- > hw/pc.c | 18 ++++++++++++++++++ > hw/pc.h | 6 ++++++ > 2 files changed, 24 insertions(+) > > diff --git a/hw/pc.c b/hw/pc.c > index 7e7e0e2..9b68282 100644 > --- a/hw/pc.c > +++ b/hw/pc.c > @@ -550,6 +550,24 @@ static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) > } > } > > +typedef struct PC { > + DeviceState parent_obj; > +} PC; > + > +static const TypeInfo pc_type_info = { > + .name = TYPE_PC_MACHINE, > + .parent = TYPE_DEVICE, > + .instance_size = sizeof(PC), > + .class_size = sizeof(DeviceClass), > +}; > + > +static void pc_register_type(void) > +{ > + type_register_static(&pc_type_info); > +} > + > +type_init(pc_register_type); > + > int e820_add_entry(uint64_t address, uint64_t length, uint32_t type) > { > int index = le32_to_cpu(e820_table.count); > diff --git a/hw/pc.h b/hw/pc.h > index e4db071..77e898f 100644 > --- a/hw/pc.h > +++ b/hw/pc.h > @@ -102,6 +102,12 @@ void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); > /* pc.c */ > extern int fd_bootchk; > > +#define TYPE_PC_MACHINE "PC" > +#define PC(obj) \ > + OBJECT_CHECK(PC, (obj), TYPE_PC_MACHINE) > +struct PC; > +typedef struct PC PC; > + > void pc_register_ferr_irq(qemu_irq irq); > void pc_acpi_smi_interrupt(void *opaque, int irq, int level); > >