From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:56427) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSk1l-0003lo-FY for qemu-devel@nongnu.org; Mon, 29 Oct 2012 03:44:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TSk1k-00024Z-Ep for qemu-devel@nongnu.org; Mon, 29 Oct 2012 03:44:53 -0400 Received: from mx1.redhat.com ([209.132.183.28]:25590) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TSk1k-00024R-5T for qemu-devel@nongnu.org; Mon, 29 Oct 2012 03:44:52 -0400 Message-ID: <508E33EF.9080809@redhat.com> Date: Mon, 29 Oct 2012 08:44:47 +0100 From: Gerd Hoffmann MIME-Version: 1.0 References: <0c11f3611c74b87c53cfff65ea24f8d6ec82f666.1351229557.git.peter.crosthwaite@xilinx.com> <508A83B7.8050401@redhat.com> In-Reply-To: Content-Type: multipart/mixed; boundary="------------060109030404000204060705" Subject: Re: [Qemu-devel] [PATCH v2 11/11] usb/ehci: Put RAM in undefined MMIO regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: vineshp@xilinx.com, peter.maydell@linaro.org, qemu-devel@nongnu.org, john.williams@xilinx.com, edgar.iglesias@gmail.com, afaerber@suse.de This is a multi-part message in MIME format. --------------060109030404000204060705 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit On 10/27/12 02:42, Peter Crosthwaite wrote: >> Any chance the access you are seeing is at offset 0x68? > > 0x1a8. which for the opregbase + 0x068 for zynq so probably what you > are thinking about. Does the attached patch help? cheers, Gerd --------------060109030404000204060705 Content-Type: text/plain; name="0001-ehci-set-extended-capability-pointer-on-pci-only.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename*0="0001-ehci-set-extended-capability-pointer-on-pci-only.patch" >>From 6a131b1476640c07317a6f44b5bb54ec53974414 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Mon, 29 Oct 2012 08:32:47 +0100 Subject: [PATCH] ehci: set extended capability pointer on pci only Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-ehci.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index a07beff..a35cbf2 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -2792,7 +2792,6 @@ static void usb_ehci_initfn(EHCIState *s, DeviceState *dev, EHCIInfo *ei) s->caps[0x06] = 0x00; s->caps[0x07] = 0x00; s->caps[0x08] = 0x80; /* We can cache whole frame, no 64-bit */ - s->caps[0x09] = 0x68; /* EECP */ s->caps[0x0a] = 0x00; s->caps[0x0b] = 0x00; @@ -2880,6 +2879,8 @@ static int usb_ehci_pci_initfn(PCIDevice *dev) s->irq = dev->irq[3]; s->dma = pci_dma_context(dev); + s->caps[0x09] = 0x68; /* EECP */ + usb_ehci_initfn(s, DEVICE(dev), &c->ehci); pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); -- 1.7.1 --------------060109030404000204060705--