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From: Avi Kivity <avi@redhat.com>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: vineshp@xilinx.com, Peter Maydell <peter.maydell@linaro.org>,
	i.mitsyanko@samsung.com, qemu-devel@nongnu.org,
	Kirill Batuzov <batuzovk@ispras.ru>,
	john.williams@xilinx.com, edgar.iglesias@gmail.com,
	afaerber@suse.de
Subject: Re: [Qemu-devel] [PATCH v5 1/2] pl330: Initial version
Date: Tue, 30 Oct 2012 15:57:00 +0200	[thread overview]
Message-ID: <508FDCAC.7060502@redhat.com> (raw)
In-Reply-To: <CAEgOgz5nDCaDC5onqVUxynRu8DbqVD3kYemuBpTk8a196ZuRHg@mail.gmail.com>

On 10/30/2012 03:42 PM, Peter Crosthwaite wrote:
> On Tue, Oct 30, 2012 at 7:51 PM, Avi Kivity <avi@redhat.com> wrote:
>> On 10/29/2012 10:32 AM, Peter Maydell wrote:
>>> On 29 October 2012 06:35, Peter Crosthwaite
>>> <peter.crosthwaite@xilinx.com> wrote:
>>>> Device model for Primecell PL330 dma controller.
>>>
>>> A general question -- this is a DMA controller so should it be using
>>> the DMAContext APIs now? Avi?
>>
>> IOMMU functionality will be folded into the memory core, so
>> address_space_rw() and family.
>>
>>
> 
> Hi Avi,
> 
> So does this mean no more dma_contexts and dma_memory_foo? 

Correct.

> I have
> remade the series (and others) using dma_memory_*. Can you point to a
> sysbus attached DMA controller currently in tree that does it properly
> so we can use it for a basis as there are several (four in total
> think) series I have pending all containing DMA which will be effected
> by this.

I don't think there are any.

If your dma controller does not have an IOMMU, all you need to do is
replace cpu_physical_memory_*(...) with
address_space_*(&address_space_memory, ...).  If it does have an IOMMU,
then you need to wait until my IOMMU patchset hits mainline (or use
DMAContext).



-- 
error compiling committee.c: too many arguments to function

  reply	other threads:[~2012-10-30 13:57 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-29  6:35 [Qemu-devel] [PATCH v5 0/2] These patches add support for the Primcell PL330 DMA controller and add it to the Xilinx Zynq machine model. Patch 1 is the device model. Patch 2 is the machine model update Peter Crosthwaite
2012-10-29  6:35 ` [Qemu-devel] [PATCH v5 1/2] pl330: Initial version Peter Crosthwaite
2012-10-29  8:32   ` Peter Maydell
2012-10-30  0:59     ` Peter Crosthwaite
2012-10-30  9:51     ` Avi Kivity
2012-10-30 13:42       ` Peter Crosthwaite
2012-10-30 13:57         ` Avi Kivity [this message]
2012-10-29  9:41   ` Igor Mitsyanko
2012-10-30  1:00     ` Peter Crosthwaite
2012-10-29  6:35 ` [Qemu-devel] [PATCH v5 2/2] xilinx_zynq: added pl330 to machine model Peter Crosthwaite

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