From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:42526) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTI7P-00015x-9O for qemu-devel@nongnu.org; Tue, 30 Oct 2012 16:09:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TTI78-0004Yu-1P for qemu-devel@nongnu.org; Tue, 30 Oct 2012 16:08:59 -0400 Received: from cantor2.suse.de ([195.135.220.15]:44212 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTI77-0004Y2-KQ for qemu-devel@nongnu.org; Tue, 30 Oct 2012 16:08:41 -0400 Message-ID: <509033C2.7050401@suse.de> Date: Tue, 30 Oct 2012 21:08:34 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1350005203-15405-1-git-send-email-afaerber@suse.de> <1350005203-15405-5-git-send-email-afaerber@suse.de> <20121016024923.6b29da4a@thinkpad.mammed.net> In-Reply-To: <20121016024923.6b29da4a@thinkpad.mammed.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH qom-cpu v2 4/7] cpus: Pass CPUState to qemu_cpu_is_self() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: Alexander Graf , Marcelo Tosatti , qemu-devel@nongnu.org, kvm , Avi Kivity Am 16.10.2012 02:49, schrieb Igor Mammedov: > On Fri, 12 Oct 2012 03:26:40 +0200 > Andreas F=C3=A4rber wrote: >=20 >> Change return type to bool, move to include/qemu/cpu.h and >> add documentation. >> >> Signed-off-by: Andreas F=C3=A4rber >> --- >> cpus.c | 10 ++++------ >> exec.c | 3 ++- >> hw/apic.c | 6 ++++-- >> include/qemu/cpu.h | 10 ++++++++++ >> kvm-all.c | 4 +++- >> qemu-common.h | 1 - >> target-i386/kvm.c | 6 ++++-- >> 7 Dateien ge=C3=A4ndert, 27 Zeilen hinzugef=C3=BCgt(+), 13 Zeilen ent= fernt(-) >> >> diff --git a/cpus.c b/cpus.c >> index 750a76f..849ea8a 100644 >> --- a/cpus.c >> +++ b/cpus.c >> @@ -638,9 +638,10 @@ void qemu_init_cpu_loop(void) >> =20 >> void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *da= ta) >> { >> + CPUState *cpu =3D ENV_GET_CPU(env); >> struct qemu_work_item wi; >> =20 >> - if (qemu_cpu_is_self(env)) { >> + if (qemu_cpu_is_self(cpu)) { >> func(data); >> return; >> } >> @@ -855,7 +856,7 @@ static void qemu_cpu_kick_thread(CPUArchState *env= ) >> exit(1); >> } >> #else /* _WIN32 */ >> - if (!qemu_cpu_is_self(env)) { >> + if (!qemu_cpu_is_self(cpu)) { >> SuspendThread(cpu->hThread); >> cpu_signal(0); >> ResumeThread(cpu->hThread); >> @@ -890,11 +891,8 @@ void qemu_cpu_kick_self(void) >> #endif >> } >> =20 >> -int qemu_cpu_is_self(void *_env) >> +bool qemu_cpu_is_self(CPUState *cpu) >> { >> - CPUArchState *env =3D _env; >> - CPUState *cpu =3D ENV_GET_CPU(env); >> - >> return qemu_thread_is_self(cpu->thread); >> } >> =20 >> diff --git a/exec.c b/exec.c >> index 7899042..e21be32 100644 >> --- a/exec.c >> +++ b/exec.c >> @@ -1685,6 +1685,7 @@ static void cpu_unlink_tb(CPUArchState *env) >> /* mask must never be zero, except for A20 change call */ >> static void tcg_handle_interrupt(CPUArchState *env, int mask) >> { >> + CPUState *cpu =3D ENV_GET_CPU(env); > Is there any chance to get rid of expensive cast on this call path? I've spent some time investigating this and it would be rather complicate= d: * We can't change the argument to CPUState yet (pushing the responsibility to the caller) since interrupt_request is being accessed til the not-yet-committable end of original part 4 series, the TB is being flushed, icount being handled, and it is being used for the first if, so not movable to a deeper block. * A pointer to this function (or the KVM version below) is stored as cpu_interrupt_handler and accessed through cpu_interrupt(), which for softmmu calls the handler and for *-user does something similar to the TCG version. This function is being used in a lot of places, so adding a CPUState argument in addition to the CPUArchState would touch a lot of places for an interim solution. * QOM makes no guarantees about subclass layout (.env placement), so going from CPUState to CPUArchState involves quite some ugly #ifdef'fery that I am trying to avoid, going only the I-know-my-type direction. I'll therefore accept your Reviewed-by to apply this and will keep working during the Soft Freeze on the follow-ups that allow changing this and others completely over to CPUState. Alex has just given green light for the ppc prerequisites so I can apply them together with xtensa to qom-cpu and post the next batch if I haven't already. Regards, Andreas >=20 >> int old_mask; >> =20 >> old_mask =3D env->interrupt_request; >> @@ -1694,7 +1695,7 @@ static void tcg_handle_interrupt(CPUArchState *e= nv, int mask) >> * If called from iothread context, wake the target cpu in >> * case its halted. >> */ >> - if (!qemu_cpu_is_self(env)) { >> + if (!qemu_cpu_is_self(cpu)) { >> qemu_cpu_kick(env); >> return; >> } >> diff --git a/hw/apic.c b/hw/apic.c >> index ccf2819..1b4cd2f 100644 >> --- a/hw/apic.c >> +++ b/hw/apic.c >> @@ -107,7 +107,7 @@ static void apic_sync_vapic(APICCommonState *s, in= t sync_type) >> length =3D offsetof(VAPICState, enabled) - offsetof(VAPICStat= e, isr); >> =20 >> if (sync_type & SYNC_TO_VAPIC) { >> - assert(qemu_cpu_is_self(&s->cpu->env)); >> + assert(qemu_cpu_is_self(CPU(s->cpu))); >> =20 >> vapic_state.tpr =3D s->tpr; >> vapic_state.enabled =3D 1; >> @@ -363,10 +363,12 @@ static int apic_irq_pending(APICCommonState *s) >> /* signal the CPU if an irq is pending */ >> static void apic_update_irq(APICCommonState *s) >> { >> + CPUState *cpu =3D CPU(s->cpu); >> + >> if (!(s->spurious_vec & APIC_SV_ENABLE)) { >> return; >> } >> - if (!qemu_cpu_is_self(&s->cpu->env)) { >> + if (!qemu_cpu_is_self(cpu)) { >> cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_POLL); >> } else if (apic_irq_pending(s) > 0) { >> cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD); >> diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h >> index ad706a6..7be983d 100644 >> --- a/include/qemu/cpu.h >> +++ b/include/qemu/cpu.h >> @@ -78,5 +78,15 @@ struct CPUState { >> */ >> void cpu_reset(CPUState *cpu); >> =20 >> +/** >> + * qemu_cpu_is_self: >> + * @cpu: The vCPU to check against. >> + * >> + * Checks whether the caller is executing on the vCPU thread. >> + * >> + * Returns: %true if called from @cpu's thread, %false otherwise. >> + */ >> +bool qemu_cpu_is_self(CPUState *cpu); >> + >> =20 >> #endif >> diff --git a/kvm-all.c b/kvm-all.c >> index 92a7137..db01aeb 100644 >> --- a/kvm-all.c >> +++ b/kvm-all.c >> @@ -854,9 +854,11 @@ static MemoryListener kvm_memory_listener =3D { >> =20 >> static void kvm_handle_interrupt(CPUArchState *env, int mask) >> { >> + CPUState *cpu =3D ENV_GET_CPU(env); >> + >> env->interrupt_request |=3D mask; >> =20 >> - if (!qemu_cpu_is_self(env)) { >> + if (!qemu_cpu_is_self(cpu)) { >> qemu_cpu_kick(env); >> } >> } >> diff --git a/qemu-common.h b/qemu-common.h >> index b54612b..2094742 100644 >> --- a/qemu-common.h >> +++ b/qemu-common.h >> @@ -326,7 +326,6 @@ int cpu_load(QEMUFile *f, void *opaque, int versio= n_id); >> /* Unblock cpu */ >> void qemu_cpu_kick(void *env); >> void qemu_cpu_kick_self(void); >> -int qemu_cpu_is_self(void *env); >> =20 >> /* work queue */ >> struct qemu_work_item { >> diff --git a/target-i386/kvm.c b/target-i386/kvm.c >> index 5b18383..cf3d2f1 100644 >> --- a/target-i386/kvm.c >> +++ b/target-i386/kvm.c >> @@ -1552,9 +1552,10 @@ static int kvm_get_debugregs(CPUX86State *env) >> =20 >> int kvm_arch_put_registers(CPUX86State *env, int level) >> { >> + CPUState *cpu =3D ENV_GET_CPU(env); >> int ret; >> =20 >> - assert(cpu_is_stopped(env) || qemu_cpu_is_self(env)); >> + assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu)); >> =20 >> ret =3D kvm_getput_regs(env, 1); >> if (ret < 0) { >> @@ -1609,9 +1610,10 @@ int kvm_arch_put_registers(CPUX86State *env, in= t level) >> =20 >> int kvm_arch_get_registers(CPUX86State *env) >> { >> + CPUState *cpu =3D ENV_GET_CPU(env); >> int ret; >> =20 >> - assert(cpu_is_stopped(env) || qemu_cpu_is_self(env)); >> + assert(cpu_is_stopped(env) || qemu_cpu_is_self(cpu)); >> =20 >> ret =3D kvm_getput_regs(env, 0); >> if (ret < 0) { >> --=20 >> 1.7.10.4 >> >> > Reviewed-by: Igor Mammedov >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg