From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44521) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTOmC-00052m-7y for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:15:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TTOmA-00084Y-N4 for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:15:32 -0400 Received: from cantor2.suse.de ([195.135.220.15]:55244 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TTOmA-000849-70 for qemu-devel@nongnu.org; Tue, 30 Oct 2012 23:15:30 -0400 Message-ID: <509097CC.8020509@suse.de> Date: Wed, 31 Oct 2012 04:15:24 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1351645206-3041-1-git-send-email-afaerber@suse.de> In-Reply-To: <1351645206-3041-1-git-send-email-afaerber@suse.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PULL] QOM CPUState patch queue 2012-10-31 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: anthony@codemonkey.ws Cc: qemu-devel@nongnu.org Am 31.10.2012 01:59, schrieb Andreas F=C3=A4rber: > Hello Anthony, >=20 > This is my current QOM CPUState queue. Please pull. >=20 > This completes Igor's first step of x86 CPU hotplug roadmap: > http://wiki.qemu.org/Features/CPUHotplug > CPU-as-a-device is still under review and blocking CPU properties/subcl= asses; > I hope to get that in during the Soft Freeze if no problems arise. >=20 > Cc: Igor Mammedov > Cc: Eduardo Habkost > Cc: Don Slutz >=20 > With Blue and Aur=C3=A9lien having applied sparc/mips prerequisites, I'= m including: > * CPUState part 4a series (CPU_COMMON -> CPUState field movements), > * remaining xtensa and ppc prerequisites, > * as well as the remainder of original CPUState part 4 series > except for the final bit depending on TLB rework. >=20 > Cc: Max Filippov > Cc: Alexander Graf >=20 > Regards, > Andreas >=20 >=20 > The following changes since commit aee0bf7d8d7564f8f2c40e4501695c492b7d= d8d1: >=20 > tap-win32: stubs to fix win32 build (2012-10-30 19:18:53 +0000) >=20 > are available in the git repository at: >=20 > git://github.com/afaerber/qemu-cpu.git qom-cpu >=20 > for you to fetch changes up to 78585fedbd53b3629150bcf8ab4c9ff32d832460= : >=20 > target-i386: Pass X86CPU to kvm_handle_halt() (2012-10-31 01:02:46 +0= 100) Branch updated with rth's Acked-by - up to 839b5630cd4f49ce10618a7bf0b705b76f3a01ca. Andreas > ---------------------------------------------------------------- > Andreas F=C3=A4rber (32): > target-i386: Inline APIC cpu_env property setting > apic: Store X86CPU in APICCommonState > target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi() > cpus: Pass CPUState to qemu_cpu_is_self() > cpus: Pass CPUState to qemu_cpu_kick_thread() > cpu: Move created field to CPUState > cpu: Move stop field to CPUState > ppce500_spin: Store PowerPCCPU in SpinKick > cpu: Move stopped field to CPUState > cpus: Pass CPUState to cpu_is_stopped() > cpus: Pass CPUState to cpu_can_run() > cpu: Move halt_cond to CPUState > cpus: Pass CPUState to qemu_tcg_cpu_thread_fn > cpus: Pass CPUState to qemu_tcg_init_vcpu() > ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set= _irq() > target-ppc: Rename kvm_kick_{env =3D> cpu} and pass PowerPCCPU > cpus: Pass CPUState to qemu_cpu_kick() > cpu: Move queued_work_{first,last} to CPUState > cpus: Pass CPUState to flush_queued_work() > cpus: Pass CPUState to qemu_wait_io_event_common() > xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb() > target-ppc: Pass PowerPCCPU to powerpc_excp() > target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall > spapr: Pass PowerPCCPU to spapr_hypercall() > spapr: Pass PowerPCCPU to hypercalls > cpus: Pass CPUState to [qemu_]cpu_has_work() > target-i386: Pass X86CPU to kvm_mce_inject() > target-i386: Pass X86CPU to cpu_x86_inject_mce() > cpus: Pass CPUState to run_on_cpu() > cpu: Move thread_id to CPUState > target-i386: Pass X86CPU to kvm_get_mp_state() > target-i386: Pass X86CPU to kvm_handle_halt() >=20 > Igor Mammedov (3): > target-i386: cpu_x86_register(): report error from property sette= r > target-i386: If x86_cpu_realize() failed, report error and do cle= anup > target-i386: Initialize APIC at CPU level >=20 > cpu-all.h | 4 - > cpu-defs.h | 6 -- > cpu-exec.c | 8 +- > cpus.c | 193 +++++++++++++++++++++++---------------= -------- > exec.c | 10 ++- > hw/apic.c | 40 ++++++---- > hw/apic_common.c | 5 +- > hw/apic_internal.h | 3 +- > hw/kvm/apic.c | 8 +- > hw/kvmvapic.c | 6 +- > hw/pc.c | 56 ++------------ > hw/ppc.c | 59 ++++++++------ > hw/ppce500_spin.c | 13 ++-- > hw/spapr.c | 6 +- > hw/spapr.h | 4 +- > hw/spapr_hcall.c | 40 ++++++---- > hw/spapr_iommu.c | 2 +- > hw/spapr_llan.c | 10 +-- > hw/spapr_rtas.c | 5 +- > hw/spapr_vio.c | 10 +-- > hw/spapr_vty.c | 4 +- > hw/sun4m.c | 2 +- > hw/sun4u.c | 2 +- > hw/xics.c | 11 ++- > hw/xtensa_pic.c | 9 ++- > include/qemu/cpu.h | 58 ++++++++++++++ > kvm-all.c | 13 +++- > monitor.c | 6 +- > qemu-common.h | 2 - > target-alpha/cpu.c | 2 +- > target-alpha/cpu.h | 4 +- > target-arm/cpu.h | 4 +- > target-cris/cpu.h | 4 +- > target-i386/cpu.c | 63 ++++++++++++++- > target-i386/cpu.h | 10 ++- > target-i386/helper.c | 16 ++-- > target-i386/kvm.c | 28 ++++--- > target-lm32/cpu.h | 4 +- > target-m68k/cpu.h | 4 +- > target-microblaze/cpu.h | 4 +- > target-mips/cpu.h | 11 +-- > target-openrisc/cpu.h | 4 +- > target-ppc/cpu.h | 6 +- > target-ppc/excp_helper.c | 40 +++++----- > target-ppc/kvm.c | 12 ++- > target-s390x/cpu.h | 4 +- > target-s390x/kvm.c | 2 +- > target-sh4/cpu.h | 4 +- > target-sparc/cpu.h | 4 +- > target-unicore32/cpu.c | 2 +- > target-unicore32/cpu.h | 4 +- > target-xtensa/cpu.h | 4 +- > 52 Dateien ge=C3=A4ndert, 501 Zeilen hinzugef=C3=BCgt(+), 334 Zeilen e= ntfernt(-) --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg