From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:38990) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TZU08-0002nn-2B for qemu-devel@nongnu.org; Fri, 16 Nov 2012 17:03:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TZU05-0001iK-01 for qemu-devel@nongnu.org; Fri, 16 Nov 2012 17:03:03 -0500 Received: from mail-pa0-f45.google.com ([209.85.220.45]:43305) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TZU04-0001iF-PW for qemu-devel@nongnu.org; Fri, 16 Nov 2012 17:03:00 -0500 Received: by mail-pa0-f45.google.com with SMTP id fb10so2070482pad.4 for ; Fri, 16 Nov 2012 14:03:00 -0800 (PST) Sender: Richard Henderson Message-ID: <50A6B812.4070802@twiddle.net> Date: Fri, 16 Nov 2012 14:02:58 -0800 From: Richard Henderson MIME-Version: 1.0 References: <1353063863-11446-1-git-send-email-aurelien@aurel32.net> <1353063863-11446-3-git-send-email-aurelien@aurel32.net> In-Reply-To: <1353063863-11446-3-git-send-email-aurelien@aurel32.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/7] target-mips: generate a reserved instruction exception on CPU without DSP List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: qemu-devel@nongnu.org On 11/16/2012 03:04 AM, Aurelien Jarno wrote: > +static inline void check_dsp(CPUMIPSState *env, DisasContext *ctx) > { > if (unlikely(!(ctx->hflags & MIPS_HFLAG_DSP))) { > - generate_exception(ctx, EXCP_DSPDIS); > + if (env->insn_flags & ASE_DSP) { > + generate_exception(ctx, EXCP_DSPDIS); > + } else { > + generate_exception(ctx, EXCP_RI); > + } Perhaps it would make more sense to copy env->insn_flags into a new field in DisasContext at the start of translation, rather than modify 300 instances to pass around a second pointer? r~