From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59273) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TgYQW-0007A1-M7 for qemu-devel@nongnu.org; Thu, 06 Dec 2012 05:11:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TgYQN-00077o-45 for qemu-devel@nongnu.org; Thu, 06 Dec 2012 05:11:32 -0500 Received: from cantor2.suse.de ([195.135.220.15]:50801 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TgYQM-00077h-Ql for qemu-devel@nongnu.org; Thu, 06 Dec 2012 05:11:23 -0500 Message-ID: <50C06F47.2020304@suse.de> Date: Thu, 06 Dec 2012 11:11:19 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1351652644-18687-1-git-send-email-afaerber@suse.de> <1351652644-18687-3-git-send-email-afaerber@suse.de> <5090AFC7.7010107@twiddle.net> In-Reply-To: <5090AFC7.7010107@twiddle.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/7] target-alpha: Turn CPU definitions into subclasses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org, Eduardo Habkost Am 31.10.2012 05:57, schrieb Richard Henderson: > On 2012-10-31 14:03, Andreas F=C3=A4rber wrote: >> +static const AlphaCPUInfo alpha_cpus[] =3D { >> + { .name =3D "ev4", .initfn =3D ev4_cpu_initfn }, >> + { .name =3D "ev5", .initfn =3D ev5_cpu_initfn }, >> + { .name =3D "ev56", .initfn =3D ev56_cpu_initfn }, >> + { .name =3D "pca56", .initfn =3D pca56_cpu_initfn }, >> + { .name =3D "ev6", .initfn =3D ev6_cpu_initfn }, >> + { .name =3D "ev67", .initfn =3D ev67_cpu_initfn }, >> + { .name =3D "ev68", .initfn =3D ev68_cpu_initfn }, >> + { .name =3D "21064", .initfn =3D alpha_21064_cpu_initfn }, >> + { .name =3D "21164", .initfn =3D alpha_21164_cpu_initfn }, >> + { .name =3D "21164a", .initfn =3D alpha_21164a_cpu_initfn }, >> + { .name =3D "21164pc", .initfn =3D alpha_21164pc_cpu_initfn }, >> + { .name =3D "21264", .initfn =3D alpha_21264_cpu_initfn }, >> + { .name =3D "21264a", .initfn =3D alpha_21264a_cpu_initfn }, >> +}; >=20 > The "2*" names are aliases of the "ev*" names. There's no need for so > much duplication. And for that matter, "ev68" is no different from "ev= 67" > at the level for which we emulate. In hw, it was more cache and a fast= er > multiply implementation. Clearly I know little to nothing about Alpha CPU models. :) Regarding ev68, we'll need to carry it for backwards compatibility; can we assume that the Alpha ISA is dead? Then I could drop this shrinking array and make, e.g., ev68 a trivial subclass of ev67. The name scheme we are heading towards now looks like -alpha-cpu. Did I understand you correctly that we would want, e.g., ev4-alpha-cpu as type and have "21064" map to it? Or the other way around? Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg