From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:46203) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TkGAl-0006bQ-0Z for qemu-devel@nongnu.org; Sun, 16 Dec 2012 10:30:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TkGAi-00051K-A9 for qemu-devel@nongnu.org; Sun, 16 Dec 2012 10:30:34 -0500 Received: from cantor2.suse.de ([195.135.220.15]:49740 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TkGAi-00051B-09 for qemu-devel@nongnu.org; Sun, 16 Dec 2012 10:30:32 -0500 Message-ID: <50CDE90D.9000603@suse.de> Date: Sun, 16 Dec 2012 16:30:21 +0100 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1355503606-54131-1-git-send-email-jfrei@linux.vnet.ibm.com> <1355503606-54131-3-git-send-email-jfrei@linux.vnet.ibm.com> In-Reply-To: <1355503606-54131-3-git-send-email-jfrei@linux.vnet.ibm.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/3] s390: Add CPU reset handler List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jens Freimann Cc: Heinz Graalfs , Alexander Graf , qemu-devel , Christian Borntraeger , Cornelia Huck , Einar Lueck Am 14.12.2012 17:46, schrieb Jens Freimann: > Add a CPU reset handler to have all CPUs in a PoP compliant > state. >=20 > Signed-off-by: Jens Freimann The logic looks okay now. Some comments inline. > --- > v2 -> v3:=20 > * explain in comment which code sets cpu 0 to running during IPL >=20 > v1 -> v2: > * move setting of control registers and psa to s390_cpu_reset > and call it from the new s390_machine_cpu_reset_cb() > This makes it more similar to how it is done on x86 > * in s390_cpu_reset() set env->halted state of cpu after > the memset. This is needed to keep our s390_cpu_running > counter in sync when s390_cpu_reset is called via the > qemu_devices_reset path > * set env->halted state in s390_cpu_initfn to 1 to avoid > decrementing the cpu counter during first reset > --- > target-s390x/cpu.c | 32 ++++++++++++++++++++++++++++++-- > target-s390x/kvm.c | 9 ++++++++- > 2 files changed, 38 insertions(+), 3 deletions(-) >=20 > diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c > index 619b202..75d4036 100644 > --- a/target-s390x/cpu.c > +++ b/target-s390x/cpu.c > @@ -4,6 +4,7 @@ > * Copyright (c) 2009 Ulrich Hecht > * Copyright (c) 2011 Alexander Graf > * Copyright (c) 2012 SUSE LINUX Products GmbH > + * Copyright (c) 2012 IBM Corp. > * > * This library is free software; you can redistribute it and/or > * modify it under the terms of the GNU Lesser General Public > @@ -18,9 +19,13 @@ > * You should have received a copy of the GNU Lesser General Public > * License along with this library; if not, see > * > + * Contributions after 2012-12-11 are licensed under the terms of the > + * GNU GPL, version 2 or (at your option) any later version. > + * > */ > =20 > #include "cpu.h" > +#include "hw/hw.h" > #include "qemu-common.h" > #include "qemu-timer.h" > =20 > @@ -37,12 +42,30 @@ static void s390_cpu_reset(CPUState *s) > log_cpu_state(env, 0); > } > =20 > - scc->parent_reset(s); > + s390_del_running_cpu(env); > =20 > + scc->parent_reset(s); If this gets respun, a white line separating the parent reset from the local reset would be nice. :) > memset(env, 0, offsetof(CPUS390XState, breakpoints)); > + > + /* architectured initial values for CR 0 and 14 */ > + env->cregs[0] =3D 0xE0UL; > + env->cregs[14] =3D 0xC2000000UL; > + /* set to z/Architecture mode */ > + env->psw.mask =3D 0x0000000180000000ULL; > + env->psa =3D 0; > + /* set halted to 1 to make sure we can add the cpu in > + * s390_ipl_cpu code, where env->halted is set back to 0 > + * after incrementing the cpu counter */ > + env->halted =3D 1; > /* FIXME: reset vector? */ Do the above added cregs/psw/psa reset values resolve this FIXME? Or does that refer to something different? > tlb_flush(env, 1); > - s390_add_running_cpu(env); > +} > + > +static void s390_cpu_machine_reset_cb(void *opaque) > +{ > + S390CPU *cpu =3D opaque; > + > + cpu_reset(CPU(cpu)); > } > =20 > static void s390_cpu_initfn(Object *obj) > @@ -66,7 +89,12 @@ static void s390_cpu_initfn(Object *obj) > env->cpu_num =3D cpu_num++; > env->ext_index =3D -1; > =20 > + /* set env->halted state to 1 to avoid decrementing the running > + * cpu counter in s390_cpu_reset to a negative number at=20 > + * initial ipl */ > + env->halted =3D 1; > cpu_reset(CPU(cpu)); > + qemu_register_reset(s390_cpu_machine_reset_cb, cpu); Since we register the reset handler in instance_init, we should unregister it in a instance_finalize callback (uninitfn?). Since we do not hot-unplug s390 CPUs yet to my knowledge, that could be done in a follow-up. (For x86 it it registered in the provisional realize function and not unregistered lacking a matching unrealization mechanism today; elsewhere reset registration is done in the machine.) > } > =20 > static void s390_cpu_class_init(ObjectClass *oc, void *data) > diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c > index 94de764..fda9f1f 100644 > --- a/target-s390x/kvm.c > +++ b/target-s390x/kvm.c > @@ -85,7 +85,14 @@ int kvm_arch_init_vcpu(CPUS390XState *env) > =20 > void kvm_arch_reset_vcpu(CPUS390XState *env) > { Note to Alex: In my upcoming KVM CPUState series, this argument type changes to CPUState ... > - /* FIXME: add code to reset vcpu. */ > + /* The initial reset call is needed here to reset in-kernel > + * vcpu data that we can't access directly from QEMU > + * (i.e. with older kernels which don't support sync_regs/ONE_REG). > + * Before this ioctl cpu_synchronize_state() is called in common kv= m > + * code (kvm-all) */ > + if (kvm_vcpu_ioctl(env, KVM_S390_INITIAL_RESET, NULL)) { ... but so does the argument for kvm_vcpu_ioctl(), so merging becomes a trivial env -> cpu change. > + perror("Can't reset vcpu\n"); > + } > } > =20 > int kvm_arch_put_registers(CPUS390XState *env, int level) Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg