From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58976) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ttg1m-0007Qn-QZ for qemu-devel@nongnu.org; Fri, 11 Jan 2013 09:56:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ttg1f-0007tE-Mo for qemu-devel@nongnu.org; Fri, 11 Jan 2013 09:56:14 -0500 Received: from smtp02.citrix.com ([66.165.176.63]:18783) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ttg1f-0007t2-Im for qemu-devel@nongnu.org; Fri, 11 Jan 2013 09:56:07 -0500 Message-ID: <50F02761.6030707@citrix.com> Date: Fri, 11 Jan 2013 14:53:21 +0000 From: Julien Grall MIME-Version: 1.0 References: <1357895886-14283-1-git-send-email-stefanha@redhat.com> <1357895886-14283-7-git-send-email-stefanha@redhat.com> <50EFFC7F.8090606@suse.de> In-Reply-To: <50EFFC7F.8090606@suse.de> Content-Type: text/plain; charset="ISO-8859-15" Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 6/6] hw/pc.c: Fix converting of ioport_register* to MemoryRegion List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?ISO-8859-15?Q?Andreas_F=E4rber?= Cc: Anthony Liguori , "qemu-devel@nongnu.org" , Stefan Hajnoczi On 01/11/2013 11:50 AM, Andreas Färber wrote: > Am 11.01.2013 10:18, schrieb Stefan Hajnoczi: >> From: Julien Grall >> >> The commit 258711 introduced MemoryRegion to replace ioport_region* >> for ioport 80h and F0h. >> A MemoryRegion needs to have both read and write callback otherwise a segfault >> will occur when an access is made. >> >> The previous behaviour of this both ioport is to return 0xffffffffffffffff. >> So keep this behaviour. >> >> Reported-by: Adam Lackorzynski >> Signed-off-by: Julien Grall >> Tested-by: Adam Lackorzynski >> Signed-off-by: Stefan Hajnoczi >> --- >> hw/pc.c | 12 ++++++++++++ >> 1 file changed, 12 insertions(+) >> >> diff --git a/hw/pc.c b/hw/pc.c >> index df0c48e..90b1bf7 100644 >> --- a/hw/pc.c >> +++ b/hw/pc.c >> @@ -103,6 +103,11 @@ static void ioport80_write(void *opaque, hwaddr addr, uint64_t data, >> { >> } >> >> +static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size) >> +{ >> + return 0xffffffffffffffff; > > Might these require ULL for i386? Indeed. I will resend a patch with ULL for ioport80_read and ioportF0_read. > >> +} >> + >> /* MSDOS compatibility mode FPU exception support */ >> static qemu_irq ferr_irq; >> >> @@ -123,6 +128,11 @@ static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data, >> qemu_irq_lower(ferr_irq); >> } >> >> +static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size) >> +{ >> + return 0xffffffffffffffff; >> +} >> + >> /* TSC handling */ >> uint64_t cpu_get_tsc(CPUX86State *env) >> { >> @@ -960,6 +970,7 @@ static void cpu_request_exit(void *opaque, int irq, int level) >> >> static const MemoryRegionOps ioport80_io_ops = { >> .write = ioport80_write, >> + .read = ioport80_read, >> .endianness = DEVICE_NATIVE_ENDIAN, >> .impl = { >> .min_access_size = 1, >> @@ -969,6 +980,7 @@ static const MemoryRegionOps ioport80_io_ops = { >> >> static const MemoryRegionOps ioportF0_io_ops = { >> .write = ioportF0_write, >> + .read = ioportF0_read, >> .endianness = DEVICE_NATIVE_ENDIAN, >> .impl = { >> .min_access_size = 1, > -- Julien