[Qemu-devel] [PATCH v4 1/3] target-i386:define name of breakpoint bit in dr7

[Qemu-devel] [PATCH v4 1/3] target-i386:define name of breakpoint bit in dr7

[liguang]

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/cpu.h |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 90ef1ff..29245d1 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -231,6 +231,13 @@
 #define DR7_TYPE_SHIFT  16
 #define DR7_LEN_SHIFT   18
 #define DR7_FIXED_1     0x00000400
+#define DR7_LOCAL_BP_MASK   0x55
+#define DR7_MAX_BP      4
+#define DR7_TYPE_BP_INST     0x0
+#define DR7_TYPE_DATA_WR     0x1
+#define DR7_TYPE_IO_RW       0x2
+#define DR7_TYPE_DATA_RW     0x3
+
 
 #define PG_PRESENT_BIT	0
 #define PG_RW_BIT	1
-- 
1.7.2.5

[Qemu-devel] [PATCH v4 2/3] target-i386:define hw_{global, local}breakpoint_enabled function

[liguang]

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/cpu.h |   15 +++++++++++++--
 1 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 29245d1..c69f81f 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -996,9 +996,20 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
 #define cpu_handle_mmu_fault cpu_x86_handle_mmu_fault
 void cpu_x86_set_a20(CPUX86State *env, int a20_state);
 
-static inline int hw_breakpoint_enabled(unsigned long dr7, int index)
+static inline bool hw_local_breakpoint_enabled(unsigned long dr7, int index)
 {
-    return (dr7 >> (index * 2)) & 3;
+    return ((dr7 >> (index * 2)) & 1);
+}
+
+static inline bool hw_global_breakpoint_enabled(unsigned long dr7, int index)
+{
+    return ((dr7 >> (index * 2)) & 2);
+}
+
+static inline bool hw_breakpoint_enabled(unsigned long dr7, int index)
+{
+    return (hw_global_breakpoint_enabled(dr7, index) ||
+            hw_local_breakpoint_enabled(dr7, index));
 }
 
 static inline int hw_breakpoint_type(unsigned long dr7, int index)
-- 
1.7.2.5

[Qemu-devel] [PATCH v4 3/3] target-i386:slightly refactor dr7 related function

[liguang]

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/helper.c      |   74 +++++++++++++++++++++++++++++---------------
 target-i386/machine.c     |    5 ++-
 target-i386/misc_helper.c |    4 +-
 target-i386/seg_helper.c  |    7 ++--
 4 files changed, 58 insertions(+), 32 deletions(-)

diff --git a/target-i386/helper.c b/target-i386/helper.c
index bf206cf..62746c5 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -966,30 +966,33 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr)
 
 void hw_breakpoint_insert(CPUX86State *env, int index)
 {
-    int type, err = 0;
+    int type = 0, err = 0;
 
     switch (hw_breakpoint_type(env->dr[7], index)) {
-    case 0:
-        if (hw_breakpoint_enabled(env->dr[7], index))
+    case DR7_TYPE_BP_INST:
+        if (hw_breakpoint_enabled(env->dr[7], index)) {
             err = cpu_breakpoint_insert(env, env->dr[index], BP_CPU,
                                         &env->cpu_breakpoint[index]);
+        }
         break;
-    case 1:
+    case DR7_TYPE_DATA_WR:
         type = BP_CPU | BP_MEM_WRITE;
-        goto insert_wp;
-    case 2:
-         /* No support for I/O watchpoints yet */
         break;
-    case 3:
+    case DR7_TYPE_DATA_RW:
         type = BP_CPU | BP_MEM_ACCESS;
-    insert_wp:
+        break;
+	case DR7_TYPE_IO_RW:
+        /* No support for I/O watchpoints yet */
+        break;
+    }
+	if (type) {
         err = cpu_watchpoint_insert(env, env->dr[index],
                                     hw_breakpoint_len(env->dr[7], index),
                                     type, &env->cpu_watchpoint[index]);
-        break;
     }
-    if (err)
+    if (err) {
         env->cpu_breakpoint[index] = NULL;
+    }
 }
 
 void hw_breakpoint_remove(CPUX86State *env, int index)
@@ -997,15 +1000,16 @@ void hw_breakpoint_remove(CPUX86State *env, int index)
     if (!env->cpu_breakpoint[index])
         return;
     switch (hw_breakpoint_type(env->dr[7], index)) {
-    case 0:
-        if (hw_breakpoint_enabled(env->dr[7], index))
+    case DR7_TYPE_BP_INST:
+        if (hw_breakpoint_enabled(env->dr[7], index)) {
             cpu_breakpoint_remove_by_ref(env, env->cpu_breakpoint[index]);
+        }
         break;
-    case 1:
-    case 3:
+    case DR7_TYPE_DATA_RW:
+    case DR7_TYPE_DATA_WR:
         cpu_watchpoint_remove_by_ref(env, env->cpu_watchpoint[index]);
         break;
-    case 2:
+    case DR7_TYPE_IO_RW:
         /* No support for I/O watchpoints yet */
         break;
     }
@@ -1014,22 +1018,42 @@ void hw_breakpoint_remove(CPUX86State *env, int index)
 int check_hw_breakpoints(CPUX86State *env, int force_dr6_update)
 {
     target_ulong dr6;
-    int reg, type;
+    int index;
     int hit_enabled = 0;
+    bool bp_match = false;
+    bool wp_match = false;
 
     dr6 = env->dr[6] & ~0xf;
-    for (reg = 0; reg < 4; reg++) {
-        type = hw_breakpoint_type(env->dr[7], reg);
-        if ((type == 0 && env->dr[reg] == env->eip) ||
-            ((type & 1) && env->cpu_watchpoint[reg] &&
-             (env->cpu_watchpoint[reg]->flags & BP_WATCHPOINT_HIT))) {
-            dr6 |= 1 << reg;
-            if (hw_breakpoint_enabled(env->dr[7], reg))
+	for (index = 0; index < DR7_MAX_BP; index++) {
+        switch (hw_breakpoint_type(env->dr[7], index)) {
+        case DR7_TYPE_BP_INST:
+            if (env->dr[index] == env->eip) {
+                bp_match = true;
+            }
+            break;
+        case DR7_TYPE_DATA_WR:
+        case DR7_TYPE_DATA_RW:
+            if (env->cpu_watchpoint[index] &&
+                env->cpu_watchpoint[index]->flags & BP_WATCHPOINT_HIT) {
+                wp_match = true;
+            }
+			break;
+        case DR7_TYPE_IO_RW:
+            break;
+        }
+        if (bp_match || wp_match) {
+            dr6 |= 1 << index;
+            if (hw_breakpoint_enabled(env->dr[7], index)) {
                 hit_enabled = 1;
+            }
+            bp_match = false;
+            wp_match = false;
         }
     }
-    if (hit_enabled || force_dr6_update)
+    if (hit_enabled || force_dr6_update) {
         env->dr[6] = dr6;
+	}
+
     return hit_enabled;
 }
 
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 4771508..67131a4 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -265,10 +265,11 @@ static int cpu_post_load(void *opaque, int version_id)
 
     cpu_breakpoint_remove_all(env, BP_CPU);
     cpu_watchpoint_remove_all(env, BP_CPU);
-    for (i = 0; i < 4; i++)
+    for (i = 0; i < DR7_MAX_BP; i++) {
         hw_breakpoint_insert(env, i);
-
+	}
     tlb_flush(env, 1);
+
     return 0;
 }
 
diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
index a020379..5ee0863 100644
--- a/target-i386/misc_helper.c
+++ b/target-i386/misc_helper.c
@@ -197,11 +197,11 @@ void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
         env->dr[reg] = t0;
         hw_breakpoint_insert(env, reg);
     } else if (reg == 7) {
-        for (i = 0; i < 4; i++) {
+        for (i = 0; i < DR7_MAX_BP; i++) {
             hw_breakpoint_remove(env, i);
         }
         env->dr[7] = t0;
-        for (i = 0; i < 4; i++) {
+        for (i = 0; i < DR7_MAX_BP; i++) {
             hw_breakpoint_insert(env, i);
         }
     } else {
diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index ff93374..306e9d1 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -465,9 +465,10 @@ static void switch_tss(CPUX86State *env, int tss_selector,
 
 #ifndef CONFIG_USER_ONLY
     /* reset local breakpoints */
-    if (env->dr[7] & 0x55) {
-        for (i = 0; i < 4; i++) {
-            if (hw_breakpoint_enabled(env->dr[7], i) == 0x1) {
+    if (env->dr[7] & DR7_LOCAL_BP_MASK) {
+        for (i = 0; i < DR7_MAX_BP; i++) {
+            if (hw_local_breakpoint_enabled(env->dr[7], i) &&
+                !hw_global_breakpoint_enabled(env->dr[7], i)) {
                 hw_breakpoint_remove(env, i);
             }
         }
-- 
1.7.2.5

Re: [Qemu-devel] [PATCH v4 1/3] target-i386:define name of breakpoint bit in dr7

[li guang]

Hi, 

any comment on this version?

在 2012-12-10一的 10:22 +0800，liguang写道：
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
>  target-i386/cpu.h |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 90ef1ff..29245d1 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -231,6 +231,13 @@
>  #define DR7_TYPE_SHIFT  16
>  #define DR7_LEN_SHIFT   18
>  #define DR7_FIXED_1     0x00000400
> +#define DR7_LOCAL_BP_MASK   0x55
> +#define DR7_MAX_BP      4
> +#define DR7_TYPE_BP_INST     0x0
> +#define DR7_TYPE_DATA_WR     0x1
> +#define DR7_TYPE_IO_RW       0x2
> +#define DR7_TYPE_DATA_RW     0x3
> +
>  
>  #define PG_PRESENT_BIT	0
>  #define PG_RW_BIT	1

-- 
regards!
li guang

Re: [Qemu-devel] [PATCH v4 1/3] target-i386:define name of breakpoint bit in dr7

[li guang]

Hi, Andreas

can these patches get an ack from you?
or they were obsoleted?


在 2012-12-10一的 10:22 +0800，liguang写道：
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
>  target-i386/cpu.h |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 90ef1ff..29245d1 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -231,6 +231,13 @@
>  #define DR7_TYPE_SHIFT  16
>  #define DR7_LEN_SHIFT   18
>  #define DR7_FIXED_1     0x00000400
> +#define DR7_LOCAL_BP_MASK   0x55
> +#define DR7_MAX_BP      4
> +#define DR7_TYPE_BP_INST     0x0
> +#define DR7_TYPE_DATA_WR     0x1
> +#define DR7_TYPE_IO_RW       0x2
> +#define DR7_TYPE_DATA_RW     0x3
> +
>  
>  #define PG_PRESENT_BIT	0
>  #define PG_RW_BIT	1

-- 
regards!
li guang

Re: [Qemu-devel] [PATCH v4 1/3] target-i386:define name of breakpoint bit in dr7

[Andreas Färber]

Hi Guang,

Am 11.01.2013 02:47, schrieb li guang:
> can these patches get an ack from you?

I'm waiting on feedback from the previous reviewers... CC'ing.

> or they were obsoleted?

No, I don't spot any need to rebase. However, patch 3/3 is tab-damaged,
please run scripts/checkpatch.pl. That can be automated as a git hook.

Regards,
Andreas

> 在 2012-12-10一的 10:22 +0800，liguang写道：
>> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
>> ---
>>  target-i386/cpu.h |    7 +++++++
>>  1 files changed, 7 insertions(+), 0 deletions(-)
>>
>> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
>> index 90ef1ff..29245d1 100644
>> --- a/target-i386/cpu.h
>> +++ b/target-i386/cpu.h
>> @@ -231,6 +231,13 @@
>>  #define DR7_TYPE_SHIFT  16
>>  #define DR7_LEN_SHIFT   18
>>  #define DR7_FIXED_1     0x00000400
>> +#define DR7_LOCAL_BP_MASK   0x55
>> +#define DR7_MAX_BP      4
>> +#define DR7_TYPE_BP_INST     0x0
>> +#define DR7_TYPE_DATA_WR     0x1
>> +#define DR7_TYPE_IO_RW       0x2
>> +#define DR7_TYPE_DATA_RW     0x3
>> +
>>  
>>  #define PG_PRESENT_BIT	0
>>  #define PG_RW_BIT	1

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH v4 1/3] target-i386:define name of breakpoint bit in dr7

[Andreas Färber]

Am 10.12.2012 03:22, schrieb liguang:
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>

For a patch series consisting of more than 1 patch, please use a cover
letter (e.g., --cover-letter) that details the change history of the
versions. That also facilitates commenting on the series vs. a single patch.

> ---
>  target-i386/cpu.h |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 90ef1ff..29245d1 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -231,6 +231,13 @@
>  #define DR7_TYPE_SHIFT  16
>  #define DR7_LEN_SHIFT   18
>  #define DR7_FIXED_1     0x00000400
> +#define DR7_LOCAL_BP_MASK   0x55
> +#define DR7_MAX_BP      4
> +#define DR7_TYPE_BP_INST     0x0
> +#define DR7_TYPE_DATA_WR     0x1
> +#define DR7_TYPE_IO_RW       0x2
> +#define DR7_TYPE_DATA_RW     0x3
> +
>  
>  #define PG_PRESENT_BIT	0
>  #define PG_RW_BIT	1

These defines are being introduced but not used in this patch yet. If
you were to replace, e.g., 4 -> DR7_MAX_BP in this patch instead of
patch 3/3, I would see a value in cherry-picking it. Assuming there is
agreement on that name, of course.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH v4 2/3] target-i386:define hw_{global, local}breakpoint_enabled function

[Andreas Färber]

Am 10.12.2012 03:22, schrieb liguang:
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
>  target-i386/cpu.h |   15 +++++++++++++--
>  1 files changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 29245d1..c69f81f 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -996,9 +996,20 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
>  #define cpu_handle_mmu_fault cpu_x86_handle_mmu_fault
>  void cpu_x86_set_a20(CPUX86State *env, int a20_state);
>  
> -static inline int hw_breakpoint_enabled(unsigned long dr7, int index)
> +static inline bool hw_local_breakpoint_enabled(unsigned long dr7, int index)
>  {
> -    return (dr7 >> (index * 2)) & 3;
> +    return ((dr7 >> (index * 2)) & 1);

There's no need to add parenthesis around this expression.

Shouldn't this ...

> +}
> +
> +static inline bool hw_global_breakpoint_enabled(unsigned long dr7, int index)
> +{
> +    return ((dr7 >> (index * 2)) & 2);

... and this use defines from 1/3 now rather than magic numbers?

Otherwise the logic seems to match what was discussed.

Andreas

> +}
> +
> +static inline bool hw_breakpoint_enabled(unsigned long dr7, int index)
> +{
> +    return (hw_global_breakpoint_enabled(dr7, index) ||
> +            hw_local_breakpoint_enabled(dr7, index));
>  }
>  
>  static inline int hw_breakpoint_type(unsigned long dr7, int index)

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH v4 3/3] target-i386:slightly refactor dr7 related function

[Andreas Färber]

This is lacking a proper description of the slight refactoring.

Am 10.12.2012 03:22, schrieb liguang:
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
>  target-i386/helper.c      |   74 +++++++++++++++++++++++++++++---------------
>  target-i386/machine.c     |    5 ++-
>  target-i386/misc_helper.c |    4 +-
>  target-i386/seg_helper.c  |    7 ++--
>  4 files changed, 58 insertions(+), 32 deletions(-)
> 
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index bf206cf..62746c5 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -966,30 +966,33 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr)
>  
>  void hw_breakpoint_insert(CPUX86State *env, int index)
>  {
> -    int type, err = 0;
> +    int type = 0, err = 0;
>  
>      switch (hw_breakpoint_type(env->dr[7], index)) {
> -    case 0:
> -        if (hw_breakpoint_enabled(env->dr[7], index))
> +    case DR7_TYPE_BP_INST:
> +        if (hw_breakpoint_enabled(env->dr[7], index)) {
>              err = cpu_breakpoint_insert(env, env->dr[index], BP_CPU,
>                                          &env->cpu_breakpoint[index]);
> +        }
>          break;
> -    case 1:
> +    case DR7_TYPE_DATA_WR:
>          type = BP_CPU | BP_MEM_WRITE;
> -        goto insert_wp;
> -    case 2:
> -         /* No support for I/O watchpoints yet */
>          break;
> -    case 3:
> +    case DR7_TYPE_DATA_RW:
>          type = BP_CPU | BP_MEM_ACCESS;
> -    insert_wp:
> +        break;
> +	case DR7_TYPE_IO_RW:

Tab should be four spaces.

> +        /* No support for I/O watchpoints yet */
> +        break;
> +    }
> +	if (type) {

Another tab.

>          err = cpu_watchpoint_insert(env, env->dr[index],
>                                      hw_breakpoint_len(env->dr[7], index),
>                                      type, &env->cpu_watchpoint[index]);
> -        break;
>      }
> -    if (err)
> +    if (err) {
>          env->cpu_breakpoint[index] = NULL;
> +    }
>  }
>  
>  void hw_breakpoint_remove(CPUX86State *env, int index)
> @@ -997,15 +1000,16 @@ void hw_breakpoint_remove(CPUX86State *env, int index)
>      if (!env->cpu_breakpoint[index])
>          return;
>      switch (hw_breakpoint_type(env->dr[7], index)) {
> -    case 0:
> -        if (hw_breakpoint_enabled(env->dr[7], index))
> +    case DR7_TYPE_BP_INST:
> +        if (hw_breakpoint_enabled(env->dr[7], index)) {
>              cpu_breakpoint_remove_by_ref(env, env->cpu_breakpoint[index]);
> +        }
>          break;
> -    case 1:
> -    case 3:
> +    case DR7_TYPE_DATA_RW:
> +    case DR7_TYPE_DATA_WR:
>          cpu_watchpoint_remove_by_ref(env, env->cpu_watchpoint[index]);
>          break;
> -    case 2:
> +    case DR7_TYPE_IO_RW:
>          /* No support for I/O watchpoints yet */
>          break;
>      }
> @@ -1014,22 +1018,42 @@ void hw_breakpoint_remove(CPUX86State *env, int index)
>  int check_hw_breakpoints(CPUX86State *env, int force_dr6_update)
>  {
>      target_ulong dr6;
> -    int reg, type;
> +    int index;
>      int hit_enabled = 0;
> +    bool bp_match = false;
> +    bool wp_match = false;
>  
>      dr6 = env->dr[6] & ~0xf;
> -    for (reg = 0; reg < 4; reg++) {
> -        type = hw_breakpoint_type(env->dr[7], reg);
> -        if ((type == 0 && env->dr[reg] == env->eip) ||
> -            ((type & 1) && env->cpu_watchpoint[reg] &&
> -             (env->cpu_watchpoint[reg]->flags & BP_WATCHPOINT_HIT))) {
> -            dr6 |= 1 << reg;
> -            if (hw_breakpoint_enabled(env->dr[7], reg))
> +	for (index = 0; index < DR7_MAX_BP; index++) {
> +        switch (hw_breakpoint_type(env->dr[7], index)) {
> +        case DR7_TYPE_BP_INST:
> +            if (env->dr[index] == env->eip) {
> +                bp_match = true;
> +            }
> +            break;
> +        case DR7_TYPE_DATA_WR:
> +        case DR7_TYPE_DATA_RW:
> +            if (env->cpu_watchpoint[index] &&
> +                env->cpu_watchpoint[index]->flags & BP_WATCHPOINT_HIT) {
> +                wp_match = true;
> +            }
> +			break;
> +        case DR7_TYPE_IO_RW:
> +            break;
> +        }
> +        if (bp_match || wp_match) {
> +            dr6 |= 1 << index;
> +            if (hw_breakpoint_enabled(env->dr[7], index)) {
>                  hit_enabled = 1;
> +            }
> +            bp_match = false;
> +            wp_match = false;
>          }
>      }
> -    if (hit_enabled || force_dr6_update)
> +    if (hit_enabled || force_dr6_update) {
>          env->dr[6] = dr6;
> +	}
> +
>      return hit_enabled;
>  }
>  
> diff --git a/target-i386/machine.c b/target-i386/machine.c
> index 4771508..67131a4 100644
> --- a/target-i386/machine.c
> +++ b/target-i386/machine.c
> @@ -265,10 +265,11 @@ static int cpu_post_load(void *opaque, int version_id)
>  
>      cpu_breakpoint_remove_all(env, BP_CPU);
>      cpu_watchpoint_remove_all(env, BP_CPU);
> -    for (i = 0; i < 4; i++)
> +    for (i = 0; i < DR7_MAX_BP; i++) {

This trivial change could be in 1/3.

>          hw_breakpoint_insert(env, i);
> -
> +	}

Tab.

>      tlb_flush(env, 1);
> +
>      return 0;
>  }
>  
> diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
> index a020379..5ee0863 100644
> --- a/target-i386/misc_helper.c
> +++ b/target-i386/misc_helper.c
> @@ -197,11 +197,11 @@ void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
>          env->dr[reg] = t0;
>          hw_breakpoint_insert(env, reg);
>      } else if (reg == 7) {
> -        for (i = 0; i < 4; i++) {
> +        for (i = 0; i < DR7_MAX_BP; i++) {
>              hw_breakpoint_remove(env, i);
>          }
>          env->dr[7] = t0;
> -        for (i = 0; i < 4; i++) {
> +        for (i = 0; i < DR7_MAX_BP; i++) {
>              hw_breakpoint_insert(env, i);
>          }
>      } else {

Move both into 1/3?

> diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
> index ff93374..306e9d1 100644
> --- a/target-i386/seg_helper.c
> +++ b/target-i386/seg_helper.c
> @@ -465,9 +465,10 @@ static void switch_tss(CPUX86State *env, int tss_selector,
>  
>  #ifndef CONFIG_USER_ONLY
>      /* reset local breakpoints */
> -    if (env->dr[7] & 0x55) {
> -        for (i = 0; i < 4; i++) {
> -            if (hw_breakpoint_enabled(env->dr[7], i) == 0x1) {
> +    if (env->dr[7] & DR7_LOCAL_BP_MASK) {
> +        for (i = 0; i < DR7_MAX_BP; i++) {

1/3?

> +            if (hw_local_breakpoint_enabled(env->dr[7], i) &&
> +                !hw_global_breakpoint_enabled(env->dr[7], i)) {
>                  hw_breakpoint_remove(env, i);
>              }
>          }

Regards,
Andreas

-- 
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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH v4 1/3] target-i386:define name of breakpoint bit in dr7

[li guang]

在 2013-01-11五的 17:10 +0100，Andreas Färber写道：
> Am 10.12.2012 03:22, schrieb liguang:
> > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> 
> For a patch series consisting of more than 1 patch, please use a cover
> letter (e.g., --cover-letter) that details the change history of the
> versions. That also facilitates commenting on the series vs. a single patch.
> 
> > ---
> >  target-i386/cpu.h |    7 +++++++
> >  1 files changed, 7 insertions(+), 0 deletions(-)
> > 
> > diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> > index 90ef1ff..29245d1 100644
> > --- a/target-i386/cpu.h
> > +++ b/target-i386/cpu.h
> > @@ -231,6 +231,13 @@
> >  #define DR7_TYPE_SHIFT  16
> >  #define DR7_LEN_SHIFT   18
> >  #define DR7_FIXED_1     0x00000400
> > +#define DR7_LOCAL_BP_MASK   0x55
> > +#define DR7_MAX_BP      4
> > +#define DR7_TYPE_BP_INST     0x0
> > +#define DR7_TYPE_DATA_WR     0x1
> > +#define DR7_TYPE_IO_RW       0x2
> > +#define DR7_TYPE_DATA_RW     0x3
> > +
> >  
> >  #define PG_PRESENT_BIT	0
> >  #define PG_RW_BIT	1
> 
> These defines are being introduced but not used in this patch yet. If
> you were to replace, e.g., 4 -> DR7_MAX_BP in this patch instead of
> patch 3/3, I would see a value in cherry-picking it. Assuming there is
> agreement on that name, of course.
> 
> Andreas
> 


OK, I will squash them into one patch.
 
-- 
regards!
li guang