From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([208.118.235.92]:39975)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <hpoussin@reactos.org>) id 1Tu6dW-0001NI-Om
	for qemu-devel@nongnu.org; Sat, 12 Jan 2013 14:21:04 -0500
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <hpoussin@reactos.org>) id 1Tu6dU-0004Hc-5h
	for qemu-devel@nongnu.org; Sat, 12 Jan 2013 14:20:58 -0500
Received: from smtp1-g21.free.fr ([2a01:e0c:1:1599::10]:60257)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <hpoussin@reactos.org>) id 1Tu6dT-0004E1-IY
	for qemu-devel@nongnu.org; Sat, 12 Jan 2013 14:20:56 -0500
Message-ID: <50F1B781.4090304@reactos.org>
Date: Sat, 12 Jan 2013 20:20:33 +0100
From: =?UTF-8?B?SGVydsOpIFBvdXNzaW5lYXU=?= <hpoussin@reactos.org>
MIME-Version: 1.0
References: <1357334986-13941-1-git-send-email-hpoussin@reactos.org>
	<1357334986-13941-7-git-send-email-hpoussin@reactos.org>
	<50F1A518.1070800@suse.de>
In-Reply-To: <50F1A518.1070800@suse.de>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: quoted-printable
Subject: Re: [Qemu-devel] [PATCH 06/10] acpi-piix4: do not use
 old_portio-style callbacks
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= <afaerber@suse.de>
Cc: qemu-devel@nongnu.org

Andreas F=C3=A4rber a =C3=A9crit :
> Am 04.01.2013 22:29, schrieb Herv=C3=A9 Poussineau:
>>  static const MemoryRegionOps piix4_pci_ops =3D {
>> -    .old_portio =3D (MemoryRegionPortio[]) {
>> -        {
>> -            .offset =3D PCI_UP_BASE - PCI_HOTPLUG_ADDR,   .len =3D 4,=
 .size =3D 4,
>> -            .read =3D pci_up_read,
>> -        },{
>> -            .offset =3D PCI_DOWN_BASE - PCI_HOTPLUG_ADDR, .len =3D 4,=
 .size =3D 4,
>> -            .read =3D pci_down_read,
>> -        },{
>> -            .offset =3D PCI_EJ_BASE - PCI_HOTPLUG_ADDR,   .len =3D 4,=
 .size =3D 4,
>> -            .read =3D pci_features_read,
>> -            .write =3D pciej_write,
>> -        },{
>> -            .offset =3D PCI_RMV_BASE - PCI_HOTPLUG_ADDR,  .len =3D 4,=
 .size =3D 4,
>> -            .read =3D pcirmv_read,
>> -        },
>> -        PORTIO_END_OF_LIST()
>> +    .read =3D pci_read,
>> +    .write =3D pci_write,
>> +    .endianness =3D DEVICE_NATIVE_ENDIAN,
>> +    .valid =3D {
>> +        .min_access_size =3D 4,
>> +        .max_access_size =3D 4,
>>      },
>> -    .endianness =3D DEVICE_LITTLE_ENDIAN,
>=20
> Ugh, question: Why is this changing Little Endian to native?

An error.
However, I was unable to find in the spec if this field is native on=20
little endian. Not that it changes anything for now, as x86 is little=20
endian...
I will respin patches, except those already in your memory-ioport branch.

Herv=C3=A9