From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:37094) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TvQWg-0007CY-M0 for qemu-devel@nongnu.org; Wed, 16 Jan 2013 05:47:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TvQWf-00014E-Cd for qemu-devel@nongnu.org; Wed, 16 Jan 2013 05:47:22 -0500 Received: from mx1.redhat.com ([209.132.183.28]:11431) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TvQWf-000143-4B for qemu-devel@nongnu.org; Wed, 16 Jan 2013 05:47:21 -0500 Message-ID: <50F68532.2060506@redhat.com> Date: Wed, 16 Jan 2013 11:47:14 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/3] optimize: track nonzero bits of registers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jay Foad Cc: qemu-devel@nongnu.org, Richard Henderson Il 16/01/2013 10:09, Jay Foad ha scritto: >> @@ -621,6 +627,87 @@ static TCGArg *tcg_constant_folding(TCGContext *s, >> uint16_t *tcg_opc_ptr, >> break; >> } >> >> + /* Simplify using known-zero bits */ >> + mask = -1; >> + switch (op) { >> + CASE_OP_32_64(ext8s): >> + if ((temps[args[1]].mask & 0x80) != 0) { >> + break; >> + } >> + CASE_OP_32_64(ext8u): >> + mask = 0xff; >> + goto and_const; >> + CASE_OP_32_64(ext16s): >> + if ((temps[args[1]].mask & 0x8000) != 0) { >> + break; >> + } >> + CASE_OP_32_64(ext16u): >> + mask = 0xffff; >> + goto and_const; >> + case INDEX_op_ext32s_i64: >> + if ((temps[args[1]].mask & 0x80000000) != 0) { >> + break; >> + } >> + case INDEX_op_ext32u_i64: >> + mask = 0xffffffffU; >> + goto and_const; >> + >> + CASE_OP_32_64(and): >> + mask = temps[args[2]].mask; >> + if (temps[args[2]].state == TCG_TEMP_CONST) { >> + and_const: >> + ; >> + } > > What's the purpose of this "if"? It is filled in by patch 3/3. Paolo