From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:38860) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tx8Kd-0001sT-GP for qemu-devel@nongnu.org; Sun, 20 Jan 2013 22:46:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tx8Kc-0005Mw-3m for qemu-devel@nongnu.org; Sun, 20 Jan 2013 22:45:59 -0500 Received: from cantor2.suse.de ([195.135.220.15]:46442 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tx8Kb-0005Mi-Py for qemu-devel@nongnu.org; Sun, 20 Jan 2013 22:45:58 -0500 Message-ID: <50FCB9EF.20004@suse.de> Date: Mon, 21 Jan 2013 04:45:51 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1358738906-13224-1-git-send-email-afaerber@suse.de> In-Reply-To: <1358738906-13224-1-git-send-email-afaerber@suse.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC qom-cpu v2 0/2] target-sh4: SuperHCPU subclasses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Igor Mammedov , Eduardo Habkost , =?UTF-8?B?QXVyw6lsaWVuIEphcm5v?= Am 21.01.2013 04:28, schrieb Andreas F=C3=A4rber: > Hello, >=20 > This series introduces SuperH CPU subclasses. > The first conversion to QOM patch had used a declarative approach reusi= ng > sh4_def_t as SuperHCPUInfo. This approach now uses imperative instance_= init > functions. To preserve -cpu ? output and case-insensitivity, distinct n= ame > and type name are used, but allowing use of the type name as done for a= lpha. >=20 > TODO: guard against abstract types (may apply to other targets as well) > TODO: move class -> name lookup to cpu.c? >=20 > This series in context: > + qom-cpu cleanups and bugfixes being queued for 1.4 > + CPUState QOM realizefn and initfn RFC for 1.5 / qom-cpu-next > ~ SuperHCPU subclasses (this series) > - SH7750 QOM'ification (to be rebased) > - cross-target refactoring of cpu_init() and "realized" behavior (TBD) >=20 > Available for testing at: > git://github.com/afaerber/qemu-cpu.git qom-cpu-sh4-classes.v2 > https://github.com/afaerber/qemu-cpu/commits/qom-cpu-sh4-classes.v2 Note that the default sh4 machine shix does not check the return value of cpu_init() and silently continues even without CPU. I've used -M r2d for testing and will try to post a fix for 1.4. Andreas > v2: > * Fixed bug in class name comparison, spotted by Igor. > * Refactored name -> ObjectClass mapping into new function. > * Moved realizefn patch into CPUState series, rebased. >=20 > v1 -> preview on GitHub: > * Redone, using combination of initfn and class_init instead of SuperHC= PUInfo. > * Adopted naming scheme suggested by Eduardo. > * Split out SuperHCPUClass field movements into separate patch. >=20 > Cc: Aur=C3=A9lien Jarno >=20 > Cc: Igor Mammedov > Cc: Eduardo Habkost >=20 > Andreas F=C3=A4rber (2): > target-sh4: Introduce SuperHCPU subclasses > target-sh4: Move PVR/PRR/CVR into SuperHCPUClass >=20 > hw/sh7750.c | 10 ++-- > target-sh4/cpu-qom.h | 13 +++++ > target-sh4/cpu.c | 124 ++++++++++++++++++++++++++++++++++++++++= +++++++- > target-sh4/cpu.h | 3 -- > target-sh4/translate.c | 94 +++++++++++++----------------------- > 5 Dateien ge=C3=A4ndert, 175 Zeilen hinzugef=C3=BCgt(+), 69 Zeilen ent= fernt(-) --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg