From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44061) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U1K6E-0006Kh-0I for qemu-devel@nongnu.org; Fri, 01 Feb 2013 12:08:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U1K68-0006Vn-Vk for qemu-devel@nongnu.org; Fri, 01 Feb 2013 12:08:25 -0500 Received: from e7.ny.us.ibm.com ([32.97.182.137]:44446) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U1K68-0006Vh-Rk for qemu-devel@nongnu.org; Fri, 01 Feb 2013 12:08:20 -0500 Received: from /spool/local by e7.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 1 Feb 2013 12:08:19 -0500 Received: from d01relay07.pok.ibm.com (d01relay07.pok.ibm.com [9.56.227.147]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id AD461C9005E for ; Fri, 1 Feb 2013 12:08:07 -0500 (EST) Received: from d01av04.pok.ibm.com (d01av04.pok.ibm.com [9.56.224.64]) by d01relay07.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r11H86fr000466 for ; Fri, 1 Feb 2013 12:08:06 -0500 Received: from d01av04.pok.ibm.com (loopback [127.0.0.1]) by d01av04.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id r11H85Ct002055 for ; Fri, 1 Feb 2013 12:08:06 -0500 Message-ID: <510BF65C.7020307@linux.vnet.ibm.com> Date: Fri, 01 Feb 2013 12:07:40 -0500 From: Corey Bryant MIME-Version: 1.0 References: <1358524968-22297-1-git-send-email-stefanb@linux.vnet.ibm.com> <1358524968-22297-4-git-send-email-stefanb@linux.vnet.ibm.com> In-Reply-To: <1358524968-22297-4-git-send-email-stefanb@linux.vnet.ibm.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH V20 3/8] Add a debug register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Stefan Berger Cc: mst@redhat.com, qemu-devel@nongnu.org, anthony@codemonkey.ws, andreas.niederl@iaik.tugraz.at On 01/18/2013 11:02 AM, Stefan Berger wrote: > This patch uses the possibility to add a vendor-specific register and > adds a debug register useful for dumping the TIS's internal state. This > register is only active in a debug build (#define DEBUG_TIS). > > Signed-off-by: Stefan Berger > --- > hw/tpm_tis.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 70 insertions(+) > > diff --git a/hw/tpm_tis.c b/hw/tpm_tis.c > index 3ed813d..f71192e 100644 > --- a/hw/tpm_tis.c > +++ b/hw/tpm_tis.c > @@ -52,6 +52,9 @@ > #define TPM_TIS_REG_DID_VID 0xf00 > #define TPM_TIS_REG_RID 0xf04 > > +/* vendor-specific registers */ > +#define TPM_TIS_REG_DEBUG 0xf90 > + > #define TPM_TIS_STS_VALID (1 << 7) > #define TPM_TIS_STS_COMMAND_READY (1 << 6) > #define TPM_TIS_STS_TPM_GO (1 << 5) > @@ -105,6 +108,11 @@ > > #define TPM_TIS_NO_DATA_BYTE 0xff > > +/* local prototypes */ > + > +static uint64_t tpm_tis_mmio_read(void *opaque, hwaddr addr, > + unsigned size); > + > /* utility functions */ > > static uint8_t tpm_tis_locality_from_addr(hwaddr addr) > @@ -346,6 +354,63 @@ static uint32_t tpm_tis_data_read(TPMState *s, uint8_t locty) > return ret; > } > > +#ifdef DEBUG_TIS > +static void tpm_tis_dump_state(void *opaque, hwaddr addr) > +{ > + static const unsigned regs[] = { > + TPM_TIS_REG_ACCESS, > + TPM_TIS_REG_INT_ENABLE, > + TPM_TIS_REG_INT_VECTOR, > + TPM_TIS_REG_INT_STATUS, > + TPM_TIS_REG_INTF_CAPABILITY, > + TPM_TIS_REG_STS, > + TPM_TIS_REG_DID_VID, > + TPM_TIS_REG_RID, > + 0xfff}; > + int idx; > + uint8_t locty = tpm_tis_locality_from_addr(addr); > + hwaddr base = addr & ~0xfff; > + TPMState *s = opaque; > + TPMTISEmuState *tis = &s->s.tis; > + > + dprintf("tpm_tis: active locality : %d\n" > + "tpm_tis: state of locality %d : %d\n" > + "tpm_tis: register dump:\n", > + tis->active_locty, > + locty, tis->loc[locty].state); > + > + for (idx = 0; regs[idx] != 0xfff; idx++) { > + dprintf("tpm_tis: 0x%04x : 0x%08x\n", regs[idx], > + (uint32_t)tpm_tis_mmio_read(opaque, base + regs[idx], 4)); > + } > + > + dprintf("tpm_tis: read offset : %d\n" > + "tpm_tis: result buffer : ", > + tis->loc[locty].r_offset); > + for (idx = 0; > + idx < tpm_tis_get_size_from_buffer(&tis->loc[locty].r_buffer); > + idx++) { > + dprintf("%c%02x%s", > + tis->loc[locty].r_offset == idx ? '>' : ' ', > + tis->loc[locty].r_buffer.buffer[idx], > + ((idx & 0xf) == 0xf) ? "\ntpm_tis: " : ""); > + } > + dprintf("\n" > + "tpm_tis: write offset : %d\n" > + "tpm_tis: request buffer: ", > + tis->loc[locty].w_offset); > + for (idx = 0; > + idx < tpm_tis_get_size_from_buffer(&tis->loc[locty].w_buffer); > + idx++) { > + dprintf("%c%02x%s", > + tis->loc[locty].w_offset == idx ? '>' : ' ', > + tis->loc[locty].w_buffer.buffer[idx], > + ((idx & 0xf) == 0xf) ? "\ntpm_tis: " : ""); > + } > + dprintf("\n"); > +} > +#endif > + > /* > * Read a register of the TIS interface > * See specs pages 33-63 for description of the registers > @@ -425,6 +490,11 @@ static uint64_t tpm_tis_mmio_read(void *opaque, hwaddr addr, > case TPM_TIS_REG_RID: > val = TPM_TIS_TPM_RID; > break; > +#ifdef DEBUG_TIS > + case TPM_TIS_REG_DEBUG: > + tpm_tis_dump_state(opaque, addr); > + break; > +#endif > } > > if (shift) { > Reviewed-by: Corey Bryant -- Regards, Corey Bryant