From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:38114) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UCTzr-000089-84 for qemu-devel@nongnu.org; Mon, 04 Mar 2013 06:56:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UCTzo-0003J3-KN for qemu-devel@nongnu.org; Mon, 04 Mar 2013 06:55:59 -0500 Received: from cantor2.suse.de ([195.135.220.15]:40905 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UCTzo-0003Is-EC for qemu-devel@nongnu.org; Mon, 04 Mar 2013 06:55:56 -0500 Message-ID: <51348BC9.9080006@suse.de> Date: Mon, 04 Mar 2013 12:55:53 +0100 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1362237527-23678-1-git-send-email-sanjayl@kymasys.com> In-Reply-To: <1362237527-23678-1-git-send-email-sanjayl@kymasys.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 00/12] KVM Support for MIPS32 Processors List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sanjay Lal Cc: Aurelien Jarno , Marcelo Tosatti , qemu-devel@nongnu.org, Gleb Natapov , kvm@vger.kernel.org Hello, Am 02.03.2013 16:18, schrieb Sanjay Lal: > The following patchset implements KVM support for MIPS32 processors, > using Trap & Emulate, with basic runtime binary translation to improve > performance. [snip] Please see http://wiki.qemu.org/Contribute/SubmitAPatch for some hints on how to improve submission of your QEMU patchset. In particular we require Signed-off-bys just like Linux, subjects should use "target-mips: " or similar based on file/directory names, subject line should be one short statement and commit message should give further explanations of what the patch is doing and why, where appropriate. Also a fair warning: I am refactoring the core CPU code, so you should be tracking qemu.git and/or mailing list for possible conflicts and rebasing necessary. In that context please prefer use of MIPSCPU over CPUMIPSState (e.g., in GIC state and functions). Please adopt our Coding Style, which among other things asks for CamelCase struct naming (e.g., MIPSGICState rather than gic_t). Please learn about QOM usage and its conventions. Your GIC should probably be a SysBusDevice, not a pre-qdev collection of manually allocated state. http://wiki.qemu.org/QOMConventions There's also an ongoing discussion about DPRINTF()s defined as no-op "do {} while(0)" leading to format string breakages over time. Recommended replacement is a macro using "do { if (FOO) { ... } } while (0)", with FOO evaluating to 0 in the no-debug case, so that everything gets compile-tested but optimized out. Regards, Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg