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From: Laszlo Ersek <lersek@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: aliguori@us.ibm.com, seabios <seabios@seabios.org>,
	David Woodhouse <dwmw2@infradead.org>,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 4/3] wakeup: only reset the CPU
Date: Tue, 05 Mar 2013 20:51:33 +0100	[thread overview]
Message-ID: <51364CC5.8060101@redhat.com> (raw)
In-Reply-To: <5136469F.7080904@redhat.com>

On 03/05/13 20:25, Paolo Bonzini wrote:
> Il 05/03/2013 20:12, Laszlo Ersek ha scritto:
>> On 03/05/13 17:59, David Woodhouse wrote:> On Tue, 2013-03-05 at 17:03 +0100, Paolo Bonzini wrote:
>>>> Resuming from suspend-to-RAM should not reset all devices.  Only the
>>>> CPU should get a reset signal.
>>>
>>> Hm... on reflection, I don't actually know if this is true.
>>>
>>> Perhaps we *should* reset all devices. After all, in a real machine
>>> they'll all have been turned off and the RAM will have been in
>>> self-refresh. Surely they have to be reset?
>>>
>>> So maybe we should *let* the i440FX PAM registers get reset to point to
>>> ROM. And fix the firmware to *cope* with that, check to see if the
>>> shadow RAM already holds an image of a started-up firmware with the
>>> correct checksum, and jump back to it.
>>>
>>> That is: perhaps it's a *SeaBIOS* bug that suspend/resume doesn't work
>>> if the PAM configuration is reset?
>>
>> I think it is indeed a problem with SeaBIOS. Open romlayout.S: [...]
>>
>> It checks the CMOS only after looking at HaveRunPost. The value of
>> HaveRunPost depends on the PAM settings. It's always 0 in ROM, in which
>> case we continue at handle_post() [src/post.c].
> 
> Actually, Peter explained that it is okay.  S3 doesn't clear the PAM
> configuration, but S4 does.  The PAM registers are attached to the same
> power line as the RAM.

Ah, you expect me to understand that "memory controller configuration"
is a superset of the PAM registers :)

Laszlo

  reply	other threads:[~2013-03-05 19:49 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-05 15:04 [Qemu-devel] [PATCH 0/3] Implement x86 soft reset Paolo Bonzini
2013-03-05 15:04 ` [Qemu-devel] [PATCH 1/3] cpu: make CPU_INTERRUPT_RESET available on all targets Paolo Bonzini
2013-03-05 15:38   ` Anthony Liguori
2013-03-05 16:10     ` Andreas Färber
2013-03-05 16:17       ` Paolo Bonzini
2013-03-05 18:00   ` Laszlo Ersek
2013-03-05 15:04 ` [Qemu-devel] [PATCH 2/3] pc: port 92 reset requires a low->high transition Paolo Bonzini
2013-03-05 17:20   ` Anthony Liguori
2013-03-05 18:05   ` Laszlo Ersek
2013-03-05 15:04 ` [Qemu-devel] [PATCH 3/3] hw: correctly implement soft reset Paolo Bonzini
2013-03-05 17:18   ` Anthony Liguori
2013-03-05 17:22   ` David Woodhouse
2013-03-05 17:43     ` Paolo Bonzini
2013-03-05 18:32   ` Laszlo Ersek
2013-03-05 15:51 ` [Qemu-devel] [PATCH 0/3] Implement x86 " David Woodhouse
2013-03-05 16:00   ` Paolo Bonzini
2013-03-05 16:13     ` Andreas Färber
2013-03-05 16:03 ` [Qemu-devel] [PATCH 4/3] wakeup: only reset the CPU Paolo Bonzini
2013-03-05 16:59   ` David Woodhouse
2013-03-05 17:10     ` Paolo Bonzini
2013-03-05 17:26       ` Peter Stuge
2013-03-05 17:42         ` Paolo Bonzini
2013-03-05 19:12     ` Laszlo Ersek
2013-03-05 19:25       ` Paolo Bonzini
2013-03-05 19:51         ` Laszlo Ersek [this message]
2013-03-06  1:45     ` Kevin O'Connor
2013-03-06  8:32       ` David Woodhouse

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