* [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write
@ 2013-03-22 9:12 liguang
2013-03-22 11:07 ` Paolo Bonzini
2013-03-22 11:20 ` Andreas Färber
0 siblings, 2 replies; 5+ messages in thread
From: liguang @ 2013-03-22 9:12 UTC (permalink / raw)
To: qemu-trivial, qemu-devel; +Cc: liguang
e.g.
$qemu-system-x86_64 -device port92
will report segment fault,
for port92_write try a un-allocated
assignment for a20_out.
so check before this assignment.
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
hw/i386/pc.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ed7d9ba..a0e8ee0 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
DPRINTF("port92: write 0x%02x\n", val);
s->outport = val;
- qemu_set_irq(*s->a20_out, (val >> 1) & 1);
+ if (s->a20_out)
+ qemu_set_irq(*s->a20_out, (val >> 1) & 1);
if (val & 1) {
qemu_system_reset_request();
}
--
1.7.2.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write
2013-03-22 9:12 [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write liguang
@ 2013-03-22 11:07 ` Paolo Bonzini
2013-03-26 8:49 ` li guang
2013-03-22 11:20 ` Andreas Färber
1 sibling, 1 reply; 5+ messages in thread
From: Paolo Bonzini @ 2013-03-22 11:07 UTC (permalink / raw)
To: liguang; +Cc: qemu-trivial, qemu-devel
Il 22/03/2013 10:12, liguang ha scritto:
> e.g.
> $qemu-system-x86_64 -device port92
> will report segment fault,
> for port92_write try a un-allocated
> assignment for a20_out.
> so check before this assignment.
>
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
> hw/i386/pc.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index ed7d9ba..a0e8ee0 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
>
> DPRINTF("port92: write 0x%02x\n", val);
> s->outport = val;
> - qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> + if (s->a20_out)
> + qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> if (val & 1) {
> qemu_system_reset_request();
> }
>
Unfortunately, this is a very common problem. The correct fix is to
change port92 to use the GPIO mechanism instead.
Paolo
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write
2013-03-22 11:07 ` Paolo Bonzini
@ 2013-03-26 8:49 ` li guang
0 siblings, 0 replies; 5+ messages in thread
From: li guang @ 2013-03-26 8:49 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-trivial, qemu-devel
在 2013-03-22五的 12:07 +0100,Paolo Bonzini写道:
> Il 22/03/2013 10:12, liguang ha scritto:
> > e.g.
> > $qemu-system-x86_64 -device port92
> > will report segment fault,
> > for port92_write try a un-allocated
> > assignment for a20_out.
> > so check before this assignment.
> >
> > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> > ---
> > hw/i386/pc.c | 3 ++-
> > 1 files changed, 2 insertions(+), 1 deletions(-)
> >
> > diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> > index ed7d9ba..a0e8ee0 100644
> > --- a/hw/i386/pc.c
> > +++ b/hw/i386/pc.c
> > @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
> >
> > DPRINTF("port92: write 0x%02x\n", val);
> > s->outport = val;
> > - qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> > + if (s->a20_out)
> > + qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> > if (val & 1) {
> > qemu_system_reset_request();
> > }
> >
>
> Unfortunately, this is a very common problem. The correct fix is to
> change port92 to use the GPIO mechanism instead.
>
Sorry, Paolo,
I'm not so familiar with 'GPIO mechanism',
can you specify more?
Thanks!
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write
2013-03-22 9:12 [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write liguang
2013-03-22 11:07 ` Paolo Bonzini
@ 2013-03-22 11:20 ` Andreas Färber
2013-03-26 8:47 ` li guang
1 sibling, 1 reply; 5+ messages in thread
From: Andreas Färber @ 2013-03-22 11:20 UTC (permalink / raw)
To: liguang; +Cc: qemu-trivial, Paolo Bonzini, qemu-devel
Am 22.03.2013 10:12, schrieb liguang:
> e.g.
> $qemu-system-x86_64 -device port92
> will report segment fault,
> for port92_write try a un-allocated
> assignment for a20_out.
> so check before this assignment.
>
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
> hw/i386/pc.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index ed7d9ba..a0e8ee0 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
>
> DPRINTF("port92: write 0x%02x\n", val);
> s->outport = val;
> - qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> + if (s->a20_out)
> + qemu_set_irq(*s->a20_out, (val >> 1) & 1);
Missing braces.
But I think it would be better to proceed with my QOM'ification [1] and
return an Error on realize here since these IRQs don't change while
realized and qdev init doesn't allow to return a textual error.
Andreas
[1] https://github.com/afaerber/qemu-cpu/commits/realize-isa
> if (val & 1) {
> qemu_system_reset_request();
> }
>
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write
2013-03-22 11:20 ` Andreas Färber
@ 2013-03-26 8:47 ` li guang
0 siblings, 0 replies; 5+ messages in thread
From: li guang @ 2013-03-26 8:47 UTC (permalink / raw)
To: Andreas Färber; +Cc: qemu-trivial, Paolo Bonzini, qemu-devel
在 2013-03-22五的 12:20 +0100,Andreas Färber写道:
> Am 22.03.2013 10:12, schrieb liguang:
> > e.g.
> > $qemu-system-x86_64 -device port92
> > will report segment fault,
> > for port92_write try a un-allocated
> > assignment for a20_out.
> > so check before this assignment.
> >
> > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> > ---
> > hw/i386/pc.c | 3 ++-
> > 1 files changed, 2 insertions(+), 1 deletions(-)
> >
> > diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> > index ed7d9ba..a0e8ee0 100644
> > --- a/hw/i386/pc.c
> > +++ b/hw/i386/pc.c
> > @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
> >
> > DPRINTF("port92: write 0x%02x\n", val);
> > s->outport = val;
> > - qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> > + if (s->a20_out)
> > + qemu_set_irq(*s->a20_out, (val >> 1) & 1);
>
> Missing braces.
Yes, Thanks!
>
> But I think it would be better to proceed with my QOM'ification [1] and
> return an Error on realize here since these IRQs don't change while
> realized and qdev init doesn't allow to return a textual error.
>
> Andreas
>
> [1] https://github.com/afaerber/qemu-cpu/commits/realize-isa
>
> > if (val & 1) {
> > qemu_system_reset_request();
> > }
> >
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-03-26 8:52 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-03-22 9:12 [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write liguang
2013-03-22 11:07 ` Paolo Bonzini
2013-03-26 8:49 ` li guang
2013-03-22 11:20 ` Andreas Färber
2013-03-26 8:47 ` li guang
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).