From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41986) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UK3QG-00078d-Q8 for qemu-devel@nongnu.org; Mon, 25 Mar 2013 05:10:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UK3QC-0001OZ-1n for qemu-devel@nongnu.org; Mon, 25 Mar 2013 05:10:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:64567) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UK3QB-0001ON-QV for qemu-devel@nongnu.org; Mon, 25 Mar 2013 05:10:27 -0400 Message-ID: <51501473.3010608@redhat.com> Date: Mon, 25 Mar 2013 10:10:11 +0100 From: Gerd Hoffmann MIME-Version: 1.0 References: <1363084369-27517-1-git-send-email-kraxel@redhat.com> <1363084369-27517-17-git-send-email-kraxel@redhat.com> <515001C2.7080201@web.de> <51500302.6040506@redhat.com> <515003E5.7000809@web.de> <5150091D.9070209@redhat.com> <51500A99.7020902@web.de> <51500D49.5030202@redhat.com> <51500D8F.6050604@web.de> In-Reply-To: <51500D8F.6050604@web.de> Content-Type: multipart/mixed; boundary="------------030002030204060207090303" Subject: Re: [Qemu-devel] [PATCH 16/18] console: stop using DisplayState in gfx hardware emulation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: Peter Maydell , Anthony Liguori , X86 , Igor Mitsyanko , Evgeny Voevodin , Stefano Stabellini , qemu-devel@nongnu.org, Dmitry Solodkiy , Maksim Kozlov This is a multi-part message in MIME format. --------------030002030204060207090303 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit On 03/25/13 09:40, Jan Kiszka wrote: > On 2013-03-25 09:39, Gerd Hoffmann wrote: >> Hi, >> >>>> Any hints in the X server log? >>> >>> "vmwlegacy(0): Weight given (565) is inconsistent with the depth >>> (24)" >> >> Weight hints depth 16 indeed. What depth used the server to run at? >> 16 or 24? > > 24 As expected. Puzzling where the 565 weight comes from ... Can you apply the attached patch, enable vmware_* + displaysurface_* tracepoints + send a log? thanks, Gerd --------------030002030204060207090303 Content-Type: text/plain; charset=UTF-8; name="0001-vmware-vga-trace-value-read-write.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="0001-vmware-vga-trace-value-read-write.patch" >>From 40ced618a80d70f579aecb397d448a45fd499c63 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Mon, 25 Mar 2013 09:53:35 +0100 Subject: [PATCH] vmware vga: trace value read+write Signed-off-by: Gerd Hoffmann --- hw/vmware_vga.c | 100 +++++++++++++++++++++++++++++++++++++------------------ trace-events | 2 ++ 2 files changed, 70 insertions(+), 32 deletions(-) diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c index 4ebfe17..d317b4e 100644 --- a/hw/vmware_vga.c +++ b/hw/vmware_vga.c @@ -721,61 +721,79 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address) uint32_t caps; struct vmsvga_state_s *s = opaque; DisplaySurface *surface = qemu_console_surface(s->vga.con); + uint32_t ret; switch (s->index) { case SVGA_REG_ID: - return s->svgaid; + ret = s->svgaid; + break; case SVGA_REG_ENABLE: - return s->enable; + ret = s->enable; + break; case SVGA_REG_WIDTH: - return surface_width(surface); + ret = surface_width(surface); + break; case SVGA_REG_HEIGHT: - return surface_height(surface); + ret = surface_height(surface); + break; case SVGA_REG_MAX_WIDTH: - return SVGA_MAX_WIDTH; + ret = SVGA_MAX_WIDTH; + break; case SVGA_REG_MAX_HEIGHT: - return SVGA_MAX_HEIGHT; + ret = SVGA_MAX_HEIGHT; + break; case SVGA_REG_DEPTH: - return s->depth; + ret = s->depth; + break; case SVGA_REG_BITS_PER_PIXEL: - return (s->depth + 7) & ~7; + ret = (s->depth + 7) & ~7; + break; case SVGA_REG_PSEUDOCOLOR: - return 0x0; + ret = 0x0; + break; case SVGA_REG_RED_MASK: - return surface->pf.rmask; + ret = surface->pf.rmask; + break; case SVGA_REG_GREEN_MASK: - return surface->pf.gmask; + ret = surface->pf.gmask; + break; case SVGA_REG_BLUE_MASK: - return surface->pf.bmask; + ret = surface->pf.bmask; + break; case SVGA_REG_BYTES_PER_LINE: - return s->bypp * s->new_width; + ret = s->bypp * s->new_width; + break; case SVGA_REG_FB_START: { struct pci_vmsvga_state_s *pci_vmsvga = container_of(s, struct pci_vmsvga_state_s, chip); - return pci_get_bar_addr(&pci_vmsvga->card, 1); + ret = pci_get_bar_addr(&pci_vmsvga->card, 1); + break; } case SVGA_REG_FB_OFFSET: - return 0x0; + ret = 0x0; + break; case SVGA_REG_VRAM_SIZE: - return s->vga.vram_size; /* No physical VRAM besides the framebuffer */ + ret = s->vga.vram_size; /* No physical VRAM besides the framebuffer */ + break; case SVGA_REG_FB_SIZE: - return s->vga.vram_size; + ret = s->vga.vram_size; + break; case SVGA_REG_CAPABILITIES: caps = SVGA_CAP_NONE; @@ -791,66 +809,84 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address) SVGA_CAP_CURSOR_BYPASS; } #endif - return caps; + ret = caps; + break; case SVGA_REG_MEM_START: { struct pci_vmsvga_state_s *pci_vmsvga = container_of(s, struct pci_vmsvga_state_s, chip); - return pci_get_bar_addr(&pci_vmsvga->card, 2); + ret = pci_get_bar_addr(&pci_vmsvga->card, 2); + break; } case SVGA_REG_MEM_SIZE: - return s->fifo_size; + ret = s->fifo_size; + break; case SVGA_REG_CONFIG_DONE: - return s->config; + ret = s->config; + break; case SVGA_REG_SYNC: case SVGA_REG_BUSY: - return s->syncing; + ret = s->syncing; + break; case SVGA_REG_GUEST_ID: - return s->guest; + ret = s->guest; + break; case SVGA_REG_CURSOR_ID: - return s->cursor.id; + ret = s->cursor.id; + break; case SVGA_REG_CURSOR_X: - return s->cursor.x; + ret = s->cursor.x; + break; case SVGA_REG_CURSOR_Y: - return s->cursor.x; + ret = s->cursor.x; + break; case SVGA_REG_CURSOR_ON: - return s->cursor.on; + ret = s->cursor.on; + break; case SVGA_REG_HOST_BITS_PER_PIXEL: - return (s->depth + 7) & ~7; + ret = (s->depth + 7) & ~7; + break; case SVGA_REG_SCRATCH_SIZE: - return s->scratch_size; + ret = s->scratch_size; + break; case SVGA_REG_MEM_REGS: case SVGA_REG_NUM_DISPLAYS: case SVGA_REG_PITCHLOCK: case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: - return 0; + ret = 0; + break; default: if (s->index >= SVGA_SCRATCH_BASE && s->index < SVGA_SCRATCH_BASE + s->scratch_size) { - return s->scratch[s->index - SVGA_SCRATCH_BASE]; + ret = s->scratch[s->index - SVGA_SCRATCH_BASE]; + break; } printf("%s: Bad register %02x\n", __func__, s->index); + ret = 0; + break; } - return 0; + trace_vmware_value_read(s->index, ret); + return ret; } static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) { struct vmsvga_state_s *s = opaque; + trace_vmware_value_write(s->index, value); switch (s->index) { case SVGA_REG_ID: if (value == SVGA_ID_2 || value == SVGA_ID_1 || value == SVGA_ID_0) { diff --git a/trace-events b/trace-events index 88b1070..ea3bdf2 100644 --- a/trace-events +++ b/trace-events @@ -970,6 +970,8 @@ displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]" # vga.c ppm_save(const char *filename, void *display_surface) "%s surface=%p" +vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x" +vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x" # savevm.c -- 1.7.9.7 --------------030002030204060207090303--